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P89LPC9331FDH bảng dữ liệu(PDF) 44 Page - NXP Semiconductors |
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P89LPC9331FDH bảng dữ liệu(HTML) 44 Page - NXP Semiconductors |
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44 / 94 page ![]() P89LPC9331_9341_9351_9361 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 10 January 2011 44 of 94 NXP Semiconductors P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core Since N ranges from 0 to 15, the CCLK frequency can be in the range of PCLK to PCLK/16. 7.22.9 CCU interrupts There are seven interrupt sources on the CCU which share a common interrupt vector. 7.23 UART The P89LPC9331/9341/9351/9361 has an enhanced UART that is compatible with the conventional 80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The P89LPC9331/9341/9351/9361 does include an independent baud rate generator. The baud rate can be selected from the oscillator (divided by a constant), Timer 1 overflow, or the independent baud rate generator. In addition to the baud rate generation, enhancements over the standard 80C51 UART include Framing Error detection, automatic address recognition, selectable double buffering and several interrupt options. The UART can be operated in four modes: shift register, 8-bit UART, 9-bit UART, and CPU clock/32 or CPU clock/16. 7.23.1 Mode 0 Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are transmitted or received, LSB first. The baud rate is fixed at 1 ⁄ 16 of the CPU clock frequency. Fig 12. Capture/compare unit interrupts 002aaa896 interrupt to CPU TOIE2 (TICR2.7) TOIF2 (TIFR2.7) TICIE2A (TICR2.0) TICF2A (TIFR2.0) TICIE2B (TICR2.1) TICF2B (TIFR2.1) TOCIE2A (TICR2.3) TOCF2A (TIFR2.3) TOCIE2B (TICR2.4) TOCF2B (TIFR2.4) TOCIE2C (TICR2.5) TOCF2C (TIFR2.5) TOCIE2D (TICR2.6) TOCF2D (TIFR2.6) EA (IEN0.7) ECCU (IEN1.4) PRIORITY ENCODER other interrupt sources ENCINT.0 ENCINT.1 ENCINT.2 |
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