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MPC5604B bảng dữ liệu(PDF) 55 Page - Freescale Semiconductor, Inc |
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MPC5604B bảng dữ liệu(HTML) 55 Page - Freescale Semiconductor, Inc |
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55 / 106 page ![]() Electrical characteristics MPC5604B/C Microcontroller Data Sheet, Rev. 8 Freescale Semiconductor 55 4.9.2 Voltage monitor electrical characteristics The device implements a Power-on Reset (POR) module to ensure correct power-up initialization, as well as four low voltage detectors (LVDs) to monitor the VDD and the VDD_LV voltage while device is supplied: • POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state • LVDHV3 monitors VDD to ensure device reset below minimum functional supply • LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range • LVDLVCOR monitors power domain No. 1 • LVDLVBKP monitors power domain No. 0 NOTE When enabled, power domain No. 2 is monitored through LVD_DIGBKP. Figure 11. Low voltage monitor vs reset 4 External regulator and capacitance circuitry must be capable of providing I DD_BV while maintaining supply VDD_BV in operating range. 5 In-rush current is seen only for short time during power-up and on standby exit (max 20 µs, depending on external LV capacitances to be load) 6 The duration of the in-rush current depends on the capacitance placed on LV pins. BV decaps must be sized accordingly. Refer to IMREG value for minimum amount of current to be provided in cc. VDD VLVDHVxH RESET VLVDHVxL |
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