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MPC5604B bảng dữ liệu(PDF) 31 Page - Freescale Semiconductor, Inc |
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MPC5604B bảng dữ liệu(HTML) 31 Page - Freescale Semiconductor, Inc |
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31 / 106 page ![]() PH[6] PCR[118] AF0 AF1 AF2 AF3 GPIO[118] E1UC[8] — MA[2] SIUL eMIOS_1 — ADC I/O I/O — O M Tristate — — — 136 D5 PH[7] PCR[119] AF0 AF1 AF2 AF3 GPIO[119] E1UC[9] CS3_2 MA[1] SIUL eMIOS_1 DSPI_2 ADC I/O I/O O O M Tristate — — — 137 C5 PH[8] PCR[120] AF0 AF1 AF2 AF3 GPIO[120] E1UC[10] CS2_2 MA[0] SIUL eMIOS_1 DSPI_2 ADC I/O I/O O O M Tristate — — — 138 A5 PH[9]9 PCR[121] AF0 AF1 AF2 AF3 GPIO[121] — TCK — SIUL — JTAGC — I/O — I — S Input, weak pull-up — — 88 127 B8 PH[10]9 PCR[122] AF0 AF1 AF2 AF3 GPIO[122] — TMS — SIUL — JTAGC — I/O — I — S Input, weak pull-up — — 81 120 B9 1 Alternate functions are chosen by setting the values of the PCR.PA bitfields inside the SIUL module. PCR.PA = 00 -> AF0; PCR.PA =01->AF1; PCR.PA =10->AF2; PCR.PA =11->AF3. This is intended to select the output functions; to use one of the input functions, the PCR.IBE bit must be written to ‘1’, regardless of the values selected in the PCR.PA bitfields. For this reason, the value corresponding to an input only function is reported as “—”. 2 Multiple inputs are routed to all respective modules internally. The input of some modules must be configured by setting the values of the PSMIO.PADSELx bitfields inside the SIUL module. 3 208 MAPBGA available only as development package for Nexus2+ 4 All WKUP pins also support external interrupt capability. See wakeup unit chapter for further details. 5 NMI has higher priority than alternate function. When NMI is selected, the PCR.AF field is ignored. 6 “Not applicable” because these functions are available only while the device is booting. Refer to BAM chapter of the reference manual for details. 7 Value of PCR.IBE bit must be 0 Table 3. Functional port pin descriptions (continued) Port pin PCR register Alternate function1 Function Peripheral I/O direction2 Pad type RESET config. Pin No. 64 LQFP 64 LQFP 5CAN 4 LIN 100 LQFP 144 LQFP 208 MAP BGA3 |
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