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MM912F634CV2AP bảng dữ liệu(PDF) 7 Page - Freescale Semiconductor, Inc

tên linh kiện MM912F634CV2AP
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MM912F634CV2AP bảng dữ liệu(HTML) 7 Page - Freescale Semiconductor, Inc

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Pin Assignment
MM912F634 Pin Description
MM912F634
Freescale Semiconductor
7
19
VS1
Power Supply Pin 1
This pin is the device power supply pin 1. VS1 is primarily supplying the VDDX
Voltage regulator and the Hall Sensor Supply Regulator (HSUP). VS1 can be
sensed via a voltage divider through the AD converter. Reverse battery protection
diode is required. See Section 4.4, “Power Supply"
20
VS2
Power Supply Pin 2
This pin is the device power supply pin 2. VS2 supplies the High Side Drivers (HSx).
Reverse battery protection diode required. See Section 4.4, “Power Supply"
21
HS1
High Side Output 1
This pin is the first High Side output. It is supplied through the VS2 pin. It is designed
to drive small resistive loads with optional PWM. In cyclic sense mode, this output
will activate periodically during low power mode. See Section 4.11, “High Side
Drivers - HS".
22
HS2
High Side Output 2
This pin is the second High Side output. It is supplied through the VS2 pin. It is
designed to drive small resistive loads with optional PWM. In cyclic sense mode, this
output will activate periodically during low power mode. See Section 4.11, “High
Side Drivers - HS".
23
HSUP
Hall Sensor Supply Output This pin is designed as an 18 V Regulator to drive Hall Sensor Elements. It is
supplied through the VS1 pin. An external capacitor (CHSUP) is needed. See
Section 4.10, “Hall Sensor Supply Output - HSUP".
24
LIN
LIN Bus I/O
This pin represents the single-wire bus transmitter and receiver. See Section 4.14,
“LIN Physical Layer Interface - LIN".
25
LGND
LIN Ground Pin
This pin is the device LIN Ground connection. DGND, LGND, and AGND are
internally connected to PGND via a back to back diode.
26
PTB0
General Purpose I/O 0
This is the General Purpose I/O pin 0 based on VDDX with the following shared
functions:
• PTB0 - Bidirectional 5.0 V (VDDX) digital port I/O with selectable internal pull-up
resistor.
• AD0 - Analog Input Channel 0, 0…2.5 V (ADC2p5) analog input
• TIM0CH0 - Timer Channel 0 Input/Output
• Rx - Selectable connection to LIN / SCI
See Section 4.17, “General Purpose I/O - PTB[0…2]".
27
PTB1
General Purpose I/O 1
This is the General Purpose I/O pin 1 based on VDDX with the following shared
functions:
• PTB1 - Bidirectional 5.0 V (VDDX) digital port I/O with selectable internal pull-up
resistor.
• AD1 - Analog Input Channel 1, 0…2.5 V (ADC2p5) analog input
• TIM0CH1 - Timer Channel 1 Input/Output
• Tx - Selectable connection to LIN / SCI
See Section 4.17, “General Purpose I/O - PTB[0…2]".
28
PTB2
General Purpose I/O 2
This is the General Purpose I/O pin 2 based on VDDX with the following shared
functions:
• PTB2 - Bidirectional 5.0 V (VDDX) digital port I/O with selectable internal pull-up
resistor.
• AD2 - Analog Input Channel 2, 0…2.5 V (ADC2p5) analog input
• TIM0CH2 - Timer Channel 2 Input/Output
• PWM - Selectable connection to PWM Channel 0 or 1
See Section 4.17, “General Purpose I/O - PTB[0…2]".
29
ADC2p5
ADC Reference Voltage
This pin represents the ADC reference voltage and has to be connected to a filter
capacitor. See Section 4.19, “Analog Digital Converter - ADC"
30
AGND
Analog Ground Pin
This pin is the device Analog to Digital Converter ground connection. DGND, LGND
and AGND are internally connected to PGND via a back to back diode.
Table 3. MM912F634 Pin Description (continued)
Pin #
Pin Name
Formal Name
Description



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