D945GTP datasheet(45/92 Pages) INTEL

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2 Technical Reference

What This Chapter Contains

2.1

Introduction .................................................................................................................. 45

2.2

Memory Resources ...................................................................................................... 45

2.3

DMA Channels ............................................................................................................. 47

2.4

Fixed I/O Map............................................................................................................... 48

2.5

PCI Configuration Space Map...................................................................................... 49

2.6

Interrupts ......................................................................................................................50

2.7

PCI Conventional Interrupt Routing Map ..................................................................... 51

2.8

Connectors................................................................................................................... 53

2.9

Jumper Block ............................................................................................................... 65

2.10 Mechanical Considerations .......................................................................................... 66

2.11 Electrical Considerations.............................................................................................. 69

2.12 Thermal Considerations ............................................................................................... 71

2.13 Reliability...................................................................................................................... 73

2.14 Environmental .............................................................................................................. 74

2.15 Regulatory Compliance................................................................................................ 75

2.1 Introduction

Sections 2.2 - 2.6 contain several standalone tables. Table 10 describes the system memory map,

Table 11 lists the DMA channels, Table 12 shows the I/O map, Table 13 defines the PCI

Conventional bus configuration space map, and Table 14 describes the interrupts. The remaining

sections in this chapter are introduced by text found with their respective section headings.

2.2 Memory Resources

2.2.1

Addressable Memory

The board utilizes 4 GB of addressable system memory. Typically the address space that is

allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (SPI

Flash), and chipset overhead resides above the top of DRAM (total system memory). On a system

that has 4 GB of system memory installed, it is not possible to use all of the installed memory due

to system address space being allocated for other system critical functions. These functions include

the following:

• BIOS/ SPI Flash (2 MB)

• Local APIC (19 MB)

• Digital Media Interface (40 MB)

• Front side bus interrupts (17 MB)

• PCI Express configuration space (256 MB)

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