Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

M48T59, M48T59Y, M48T59V

Operation modes

9/32

The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are

the Address Inputs are changed while E and G remain active, output data will remain valid

Figure 5.

Read mode AC waveforms

Note:

WRITE enable (W) = High.

Table 3.

Read mode AC characteristics

Symbol

1.

noted).

M48T59/Y/V

Unit

–70

Min

Max

READ cycle time

70

ns

(2)

2.

Address valid to output valid

70

ns

tELQV

(2)

Chip enable low to output valid

70

ns

(2)

Output enable low to output valid

35

ns

(3)

3.

Chip enable low to output transition

5

ns

(3)

Output enable low to output transition

5

ns

(3)

Chip enable high to output Hi-Z

25

ns

(3)

Output enable high to output Hi-Z

25

ns

(2)

Address transition to output transition

10

ns

AI01385

tAVAV

tAVQV

tAXQX

tELQV

tELQX

tEHQZ

tGLQV

tGLQX

tGHQZ

VALID

A0-A12

E

G

DQ0-DQ7

VALID