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ISL97635 bảng dữ liệu(PDF) 19 Page - Intersil Corporation |
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ISL97635 bảng dữ liệu(HTML) 19 Page - Intersil Corporation |
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19 / 28 page ![]() 19 FN6434.2 December 22, 2008 PWM Brightness Control Register (0x00) The Brightness control resolution has 256 steps of PWM duty cycle adjustment. The bit assignment is shown in Figure 23. All of the bits in this Brightness Control Register can be read or write. Step 0 corresponds to the minimum step where the current is less than 10µA. Steps 1 to 255 represent the linear steps between 0.39% and 100% duty cycle with approximately 0.39% duty cycle adjustment per step. • An SMBus Write Byte cycle to Register 0x00 sets the PWM brightness level only if the backlight controller is in SMBus mode (see Table 3 Operating Modes selected by Device Control Register Bits 1 and 2). • An SMBus Read Byte cycle to Register 0x00 returns the programmed PWM brightness level, regardless of the value of PWM_SEL. • An SMBus setting of 0xFF for Register 0x00 sets the backlight controller to the maximum brightness. • An SMBus setting of 0x00 for Register 0x00 sets the backlight controller to the minimum brightness output in which the LED current is guaranteed to be less than 10µA. • Default value for Register 0x00 is 0xFF. Device Control Register (0x01) This register has 2 bits that control the operating mode of the backlight controller and a single bit that controls the BL ON/OFF state. The remaining bits are reserved. The bit assignment is shown in Figure 24. All other bits in the Device Control Register will read as low unless otherwise written. Bits 7 and 6 are not implemented and will always read low. TABLE 2B. DATA BIT DESCRIPTIONS ADDRESS REGISTER DATA BIT DESCRIPTIONS 0x00 PWM Brightness Control Register BRT[7..0] = 256 steps of DPWM duty cycle brightness control 0x01 Device Control Register PWM_MD = PWM mode select bit (1 = absolute brightness, 0 = % change), default = 0 PWM_SEL = Brightness control select bit (1 = control by PWMI, 0 = control by SMBus), default = 0 BL_CTL = BL On/Off (1 = On, 0 = Off), default = 0 0x02 Fault/Status Register 2_CH_SD = Two LED output channels are shutdown (1 = shutdown, 0 = OK) 1_CH_SD = One LED output channel is shutdown (1 = shutdown, 0 = OK) BL_STAT = BL status (1 = BL On, 0 = BL Off) OV_CURR = Input overcurrent (1 = Overcurrent condition, 0 = Current OK) THRM_SHDN = Thermal Shutdown (1 = Thermal fault, 0 = Thermal OK) FAULT = Fault occurred (Logic “OR” of all of the fault conditions) 0x03 Identification Register MFG[3..0] = Manufacturer ID (16 vendors available. Intersil is vendor ID 9) REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins) 0x07 DC Brightness Control Register BRTDC[7..0] = 256 steps of DC brightness control 0x08 Configuration Register VSC[1..0] = Short circuit thresholds selection FSW[2] = Switching frequencies selection 0x09 Output Channel Mask/Fault Readout Register CH[5..0] = Output Channel Read and Write. In Write, 1 = Channel Enabled, 0 = Channel Disabled. In Read, 1 = Channel OK, 0 = Channel Not OK/Channel disabled PWM_MD PWM_SEL MODE X 1 PWMI Mode 1 0 SMBus Mode 0 0 SMBus and PWMI mode with DPST VSC1 VSC0 OPERATION 0 X No VSC error detection 1 0 VSC = 3.1V ±15% 1 1 VSC = 8V ±15% fSW OPERATION 0fSW = 600kHz 1fSW = 1.2MHz ISL97635 |
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