ISL97635 datasheet(16/28 Pages) INTERSIL

16 / 28 page

FN6434.2

December 22, 2008

TABLE 1. PROTECTIONS TABLE

CASE

FAILURE MODE

DETECTION MODE

FAILED CHANNEL ACTION

GOOD CHANNELS ACTION

VOUT

REGULATED BY

CH0 Short Circuit

Upper

Over-Temperature

Protection limit (OTP)

not triggered and VIIN0

< VSC

CH0 ON and burns power

CH1 through CH7 Normal

Highest VF of

CH1 through CH7

CH0 Short Circuit

Upper OTP triggered but

VIN0 < VSC

CH0 goes off until chip cooled and

then comes back on with current

reduced to 76%. Further OTP

triggers result in reduction to 53%,

then 30%. Thermal event reported

in Fault/Status Register.

Same as CH0

Highest VF of

CH1 through CH7

CH0 Short Circuit

Upper OTP not triggered

but VIIN0 > VSC

CH0 doubled after 6ms time-out.

Time-out reduced to 420µs if above

lower OTP limit

CH1 through CH7 Normal

Highest VF of

CH1 through CH7

CH0 Open Circuit

with infinite

resistance

Upper OTP not triggered

and VIIN0 < VSC

VOUT will ramp to OVP. CH0 will

time-out after 6ms (800µs if above

lower OTP limit) and switch off.

VOUT will drop to normal level.

CH1 through CH7 Normal

Highest VF of

CH1 through CH7

CH0 LED Open

Circuit but has

paralleled Zener

Upper OTP not triggered

and VIIN0 < VSC

CH0 remains ON and has highest

VF, thus VOUT increases

CH1 through CH7 ON, Q1

through Q7 burn power

VF of CH0

CH0 LED Open

Circuit but has

paralleled Zener

Upper OTP triggered but

VIIN0 < VSC

CH0 goes off until chip cooled and

then comes back on with current

reduced to 76%. Further OTP

triggers result in reduction to 53%,

then 30%. Thermal event reported

in Fault/Status Register.

Same as CH0

VF of CH0

CH0 LED Open

Circuit but has

paralleled Zener

Upper OTP not triggered

but VIIN0 > VSC

CH0 OFF

CH1 through CH7 Normal

Highest VF of

CH1 through CH7

Upper OTP not triggered

but VIINx > VSC

CH0 remains ON and has highest

VF, thus VOUT increases.

VOUT increases then CH-X

switches OFF. This is an

unwanted shut off and can be

prevented by setting OVP and/or

VSC at an appropriate level.

VF of CH0

Channel-to-Channel

ΔVF too high

Lower OTP triggered but

VIINx < VSC

Any channel at below 50% of the target current will fault out after

400µs.

Remaining channels driven with normal current.

Highest VF of

CH0 through CH7

Channel-to-Channel

ΔVF too high

Upper OTP triggered but

VIINx < VSC

All channels switched off until chip cooled and then comes back on

with current reduced to 76%. Further OTP triggers result in reduction

to 53%, then 30%. Thermal event reported in Fault/Status Register.

Highest VF of

CH0 through CH7

Output LED stack

voltage too high

VOUT > VOVP

Driven with normal current. Any channel that is below 50% of the target

current will time-out after 6ms.

Highest VF of

CH0 through CH7

VOUT/LX shorted to

GND

LX current and timing

are monitored.

OVP pin monitored for

excursions below 20% of

OVP threshold

Fault switch disabled and system shutdown until fault goes away,

VOUT is checked at start-up with a low current from LX to check for

presence of short before the fault switch is enabled.

ISL97635

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