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ZXLD1374EST20TC bảng dữ liệu(PDF) 30 Page - Diodes Incorporated |
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ZXLD1374EST20TC bảng dữ liệu(HTML) 30 Page - Diodes Incorporated |
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30 / 35 page ![]() ZXLD1374 ZXLD1374 Document number: DS35032 Rev. 1 - 2 Page 30 of 35 www.diodes.com October 2010 © Diodes Incorporated A Product Line of Diodes Incorporated Applications Information (Continued) PCB Layout considerations PCB layout is a fundamental activity to get the most of the device in all configurations. In the following section it is possible to find some important insight to design with the ZXLD1374 both in Buck and Buck-boost/Boost configurations. Figure 51. Circuit Layout Here are some considerations useful for the PCB layout: - In order to avoid ringing due to stray inductances, the inductor L1, the anode of D1 and the LX pin should be placed as close together as possible. - The shaping capacitor C1 is fundamental for the stability of the control loop. To this end it should be placed no more than 5mm from the SHP pin. - Input voltage pins, VIN and VAUX, need to be decoupled. It is recommended to use two ceramic capacitors of 2.2uF, X7R, 100V (C3 and C4). In addition to these capacitors, it is suggested to add two ceramic capacitors of 1uF, X7R, 100V each (C2, C8), as well as a further decoupling capacitor of 100nF close to the VIN/VAUX pins (C9) the device is used in Buck mode, or can be driven from a separate supply. |
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