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PIC16F720-E/ML bảng dữ liệu(PDF) 205 Page - Microchip Technology |
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PIC16F720-E/ML bảng dữ liệu(HTML) 205 Page - Microchip Technology |
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205 / 244 page ![]() 2010 Microchip Technology Inc. DS41430A-page 205 PIC16F/LF720/721 FIGURE 23-12: PIC16F720/721 A/D CONVERSION TIMING (SLEEP MODE) FIGURE 23-13: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING AD132 AD131 AD130 BSF ADCON0, GO Q4 A/D CLK A/D Data ADRES ADIF GO Sample OLD_DATA Sampling Stopped DONE NEW_DATA 7 5 32 10 Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction to be executed. AD134 4 6 1 TCY (TOSC/2 + TCY(1)) 1 TCY Note: Refer to Figure 23-2 for load conditions. US121 US121 US120 US122 CK DT TABLE 23-9: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS Standard Operating Conditions (unless otherwise stated) Operating Temperature -40°C TA +125°C Param. No. Symbol Characteristic Min. Max. Units Conditions US120* TCKH2DTV SYNC XMIT (Master and Slave) Clock high to data-out valid 3.0-5.5V — 80 ns 1.8-5.5V — 100 ns US121* TCKRF Clock out rise time and fall time (Master mode) 3.0-5.5V — 45 ns 1.8-5.5V — 50 ns US122* TDTRF Data-out rise time and fall time 3.0-5.5V — 45 ns 1.8-5.5V — 50 ns * These parameters are characterized but not tested. |
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