PIC16F720-ESLASHML datasheet(204/244 Pages) MICROCHIP

204 / 244 page

PIC16F/LF720/721

DS41430A-page 204

 2010 Microchip Technology Inc.

FIGURE 23-11:

PIC16F720/721 A/D CONVERSION TIMING (NORMAL MODE)

TABLE 23-8:

PIC16F720/721 A/D CONVERSION REQUIREMENTS

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C £ TA £ +125°C

Param

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

AD130* TAD

A/D Clock Period

1.0

—

9.0

SVDD  2.0V(2)

4.0

—

16.0

SVDD  2.0V(2)

A/D Internal RC Oscillator

Period

1.0

2.0

6.0

S

(ADRC mode)

AD131

TCNV

Conversion Time (not including

Acquisition Time)(1)

—

10.5

—

TAD

Set GO/DONE bit to new data in A/D

Result register

AD132* TACQ

Acquisition Time

—

SVDD = 3.0V, EC or INTOSC Clock

mode(3)

These parameters are characterized but not tested.

†

Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

Note 1: The ADRES register may be read on the following TCY cycle.

Setting of 16.0

s TAD not recommended for temperature > 85°C.

3: If ADRC mode is selected for use with VDD

2.0V, longer acquisition times will be required (see Section 9.3 “A/D Acqui-

sition Requirements” )

AD131

AD130

BSF ADCON0, GO

A/D CLK

A/D Data

ADRES

ADIF

Sample

OLD_DATA

Sampling Stopped

DONE

NEW_DATA

Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the

SLEEP

instruction to be executed.

1 TCY

AD134

(TOSC/2(1))

1 TCY

AD132

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