LTC2463CDDPBF datasheet(4/20 Pages) LINER

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LTC2461/LTC2463

24613f

The

l denotes the speciﬁcations which apply over the full operating temperature

range, otherwise speciﬁcations are at TA = 25°C. (Notes 2, 7)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VIH

High Level Input Voltage

0.7VCC

VIL

Low Level Input Voltage

0.3VCC

Digital Input Current

–10

μA

VHYS

Hysteresis of Schmidt Trigger Inputs

(Note 3)

0.05VCC

VOL

Low Level Output Voltage (SDA)

I = 3mA

0.4

IIN

Input Leakage

0.1VCC ≤ VIN ≤ 0.9VCC

1μA

Capacitance for Each I/O Pin

Capacitance Load for Each Bus Line

400

VIH(A0)

High Level Input Voltage for Address Pin

0.95VCC

VIL(A0)

Low Level Input Voltage for Address Pin

0.05VCC

I2C INPUTS AND OUTPUTS

The

l denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at TA = 25°C. (Notes 2, 7)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tCONV

Conversion Time

16.6

fSCL

SCL Clock Frequency

400

kHz

tHD(SDA,STA)

Hold Time (Repeated) START Condition

0.6

μs

tLOW

LOW Period of the SCL Pin

1.3

μs

tHIGH

HIGH Period of the SCL Pin

0.6

μs

tSU(STA)

Set-Up Time for a Repeated START Condition

0.6

μs

tHD(DAT)

Data Hold Time

0.9

μs

tSU(DAT)

Data Set-Up Time

100

Rise Time for SDA, SCL Signals

(Note 6)

20 + 0.1CB

300

Fall Time for SDA, SCL Signals

(Note 6)

20 + 0.1CB

300

tSU(STO)

Set-Up Time for STOP Condition

0.6

μs

tBUF

Bus Free Time Between a Stop and Start Condition

1.3

μs

tOF

Output Fall Time VIHMIN to VILMAX

Bus Load CB = 10pF to

400pF (Note 6)

20 + 0.1CB

250

tSP

Input Spike Suppression

I2C TIMING CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to GND. VCC = 2.7V to 5.5V

unless otherwise speciﬁed.

Note 3: Guaranteed by design, not subject to test.

Note 4: Integral nonlinearity is deﬁned as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

Guaranteed by design and test correlation.

Note 5: Input sampling current is the average input current drawn from

the input sampling network while the LTC2461/LTC2463 are converting.

Note 6: CB = capacitance of one bus line in pF.

Note 7: All values refer to VIH(MIN) and VIL(MAX) levels.

Note 8: A positive current is ﬂowing into the DUT pin.

Note 9: Voltage temperature coefﬁcient is calculated by dividing the

maximum change in output voltage by the speciﬁed temperature range.

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