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M68HC16 Z SERIES

CENTRAL PROCESSOR UNIT

USER’S MANUAL

4-11

4.6.8 Use of CPU16 Indexed Mode to Replace M68HC11 Direct Mode

In M68HC11 systems, the direct addressing mode can be used to perform rapid ac-

cesses to RAM or I/O mapped from $0000 to $00FF. The CPU16 uses the first 512

bytes of bank 0 for exception vectors. To provide an enhanced replacement for the

M68HC11’s direct addressing mode, the ZK field and index register Z have been as-

signed reset initialization vectors. By resetting the ZK field to a chosen page and using

indexed mode addressing, a programmer can access useful data structures anywhere

in the address map.

4.7 Instruction Set

The CPU16 instruction set is based on the M68HC11 instruction set, but the opcode

map has been rearranged to maximize performance with a 16-bit data bus. Most

M68HC11 code can run on the CPU16 following reassembly. The user must take into

account changed instruction times, the interrupt mask, and the changed interrupt stack

frame (refer to

Transporting M68HC11 Code to M68HC16 Devices,Freescale Pro-

gramming Note M68HC16PN01/D, for more information).

4.7.1 Instruction Set Summary

Table 4-2 is a quick reference to the entire CPU16 instruction set. Refer to the

CPU16

Reference Manual (CPU16RM/AD) for detailed information about each instruction, as-

sembler syntax, and condition code evaluation. Table 4-3 provides a key to the table

nomenclature.

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