TAS5616

SLAS596B – JUNE 2009 – REVISED JANUARY 2010

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ERROR REPORTING

The SD, OTW, OTW1 and OTW2 pins are active-low, open-drain outputs. Their function is for protection-mode

signaling to a PWM controller or other system-control device.

Any fault resulting in device shutdown is signaled by the SD pin going low. Likewise, OTW and OTW2 goes low

when the device junction temperature exceeds 125°C and OTW1 goes low when the junction temperature

exceeds 100°C (see the following table).

SD

OTW1

OTW2,

DESCRIPTION

OTW

0

0

0

Overtemperature (OTE) or overload (OLP) or undervoltage (UVP)

0

0

1

Overload (OLP) or undervoltage (UVP). Junction temperature

higher than 100°C (overtemperature warning)

0

1

1

Overload (OLP) or undervoltage (UVP)

1

0

0

Junction temperature higher than 125°C (overtemperature warning)

1

0

1

Junction temperature higher than 100°C (overtemperature warning)

1

1

1

Junction temperature lower than 100°C and no OLP or UVP faults

(normal operation)

Note that asserting either RESET low forces the SD signal high, independent of faults being present. TI

recommends monitoring the OTW signal using the system microcontroller and responding to an overtemperature

warning signal by, e.g., turning down the volume to prevent further heating of the device resulting in device

shutdown (OTE).

To reduce external component count, an internal pullup resistor to 3.3 V is provided on both SD and OTW

outputs. Level compliance for 5-V logic can be obtained by adding external pullup resistors to 5 V (see the

Electrical Characteristics table of this data sheet for further specifications).

DEVICE PROTECTION SYSTEM

The TAS5616 contains advanced protection circuitry carefully designed to facilitate system integration and ease

of use, as well as to safeguard the device from permanent failure due to a wide range of fault conditions such as

short circuits, overload, overtemperature, and undervoltage. The TAS5616 responds to a fault by immediately

setting the power stage in a high-impedance (Hi-Z) state and asserting the SD pin low. In situations other than

overload and over-temperature error (OTE), the device automatically recovers when the fault condition has been

removed, i.e., the supply voltage has increased.

The device will function on errors, as shown in the following table.

BTL MODE

PBTL MODE

SE MODE

LOCAL ERROR IN

TURNS OFF

LOCAL ERROR IN

TURNS OFF

LOCAL ERROR IN

TURNS OFF

A

A

A

A+B

A+B

B

B

B

A+B+B+D

C

C

C

B+D

B+D

D

D

D

Bootstrap UVP does not shutdown according to the table, it shuts down the respective halfbridge.

PIN-TO-PIN SHORT CIRCUIT PROTECTION (PPSC)

The PPSC detection system protects the device from permanent damage in the case that a power output pin

(OUT_X) is shorted to GND_X or PVDD_X. For comparison the OC protection system detects an over current

after the demodulation filter where PPSC detects shorts directly at the pin before the filter. PPSC detection is

performed at startup i.e. when VDD is supplied, consequently a short to either GND_X or PVDD_X after system

startup will not activate the PPSC detection system. When PPSC detection is activated by a short on the output,

all half bridges are kept in a Hi-Z state until the short is removed, the device then continues the startup sequence

and starts switching. The detection is controlled globally by a two step sequence. The first step ensures that

there are no shorts from OUT_X to GND_X, the second step tests that there are no shorts from OUT_X to

PVDD_X. The total duration of this process is roughly proportional to the capacitance of the output LC filter. The

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