PC912XDP512F0CFVR datasheet(440/1348 Pages) FREESCALE

440 / 1348 page

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XDP512 Data Sheet, Rev. 2.21

440

Freescale Semiconductor

Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and

INITAK = 1)

Write: Unimplemented

NOTE

Reading this register when in any other mode other than sleep or

initialization mode may return an incorrect value. For MCUs with dual

CPUs, this may result in a CPU fault condition.

Writing to this register when in special modes can alter the MSCAN

functionality.

10.3.2.16 MSCAN Transmit Error Counter (CANTXERR)

This register reﬂects the status of the MSCAN transmit error counter.

Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and

INITAK = 1)

Write: Unimplemented

NOTE

Reading this register when in any other mode other than sleep or

initialization mode, may return an incorrect value. For MCUs with dual

CPUs, this may result in a CPU fault condition.

Writing to this register when in special modes can alter the MSCAN

functionality.

76543210

RXERR7

RXERR6

RXERR5

RXERR4

RXERR3

RXERR2

RXERR1

RXERR0

Reset:

00000000

= Unimplemented

Figure 10-18. MSCAN Receive Error Counter (CANRXERR)

76543210

TXERR7

TXERR6

TXERR5

TXERR4

TXERR3

TXERR2

TXERR1

TXERR0

Reset:

00000000

= Unimplemented

Figure 10-19. MSCAN Transmit Error Counter (CANTXERR)

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