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ST7MC2XX bảng dữ liệu(PDF) 97 Page - STMicroelectronics |
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ST7MC2XX bảng dữ liệu(HTML) 97 Page - STMicroelectronics |
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97 / 309 page  97/309 (cont’d) A basic example of interconnections between a single master and a single slave is illustrated in Figure 56. The MOSI pins are connected together and the MISO pins are connected together. In this way data is transferred serially between master and slave (most significant bit first). The communication is always initiated by the mas- ter. When the master device transmits data to a slave device via MOSI pin, the slave device re- sponds by sending data to the master device via the MISO pin. This implies full duplex communica- tion with both data out and data in synchronized with the same clock signal (which is provided by the master device via the SCK pin). To use a single data line, the MISO and MOSI pins must be connected at each node (in this case only simplex communication is possible). Four possible data/clock timing relationships may be chosen (see Figure 59 on page 100) but master and slave must be programmed with the same tim- ing mode. 8-bit SHIFT REGISTER SPI CLOCK GENERATOR 8-bit SHIFT REGISTER MISO MOSI MOSI MISO SCK SCK SS SS +5V MSBit LSBit MSBit LSBit Not used if SS is managed by software 1 |
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