Obsolete

Product(s)

- Obsolete

Product(s)

TSA1002

2/20

ABSOLUTE MAXIMUM RATINGS

OPERATING CONDITIONS

1)Condition VRefP-VRefM>0.3V

BLOCK DIAGRAM

Symbol

Parameter

Values

Unit

AVCC

0 to 3.3

V

DVCC

0 to 3.3

V

VCCB

0 to 3.3

V

IDout

Digital output current

-100 to 100

mA

Tstg

Storage temperature

+150

C

ESD

Electrical Static Discharge

- HBM

- CDM-JEDEC Standard

2

1.5

KV

KV

A

1) All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages

must never exceed -0.3V or VCC+0V

2) Corporate ST Microelectronics procedure number 0018695

Symbol

Parameter

Min

Typ

Max

Unit

AVCC

Analog Supply voltage

2.25

2.5

2.7

V

DVCC

Digital Supply voltage

2.25

2.5

2.7

V

VCCB

Digital buffer Supply voltage

2.25

2.5

2.7

V

VREFP

0.5

1

1.8

V

VREFM

00

0.5

V

INCM

Forced input common mode voltage

0.2

0.5

1.1

V

stage

stage

stage

1

2

n

Reference

Timing

circuit

Sequencer-phase shifting

Digital data correction

Buffers

IPOL

VREFM

VREFP

CLK

+2.5V

VIN

VINB

DFSB

OEB

DR

DO

TO

D9

OR

INCM

GND

GNDA