TCA6408_09 datasheet(8/31 Pages) TI

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Device Address

Slave Address

0 AD

DR R/W

Fixed

Programmable

Control Register and Command Byte

TCA6408

LOW-VOLTAGE 8-BIT I2C AND SMBus I/O EXPANDER

WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

SCPS151C – FEBRUARY 2007 – REVISED JUNE 2007

Interface Definition

BIT

BYTE

7 (MSB)

0 (LSB)

I2C slave address

ADDR

R/W

I/O data bus

The address of the TCA6408 is shown in Figure 4.

Figure 4. TCA6408 Address

Address Reference

ADDR

I2C BUS SLAVE ADDRESS

32 (decimal), 20 (hexadecimal)

33 (decimal), 21 (hexadecimal)

The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read

operation, while a low (0) selects a write operation.

Following the successful acknowledgement of the address byte, the bus master sends a command byte, which

is stored in the control register in the TCA6408. Two bits of this data byte state the operation (read or write) and

the internal registers (input, output, polarity inversion or configuration) that will be affected. This register can be

written or read through the I2C bus. The command byte is sent only during a write transmission.

Figure 5. Control Register Bits

Command Byte

CONTROL REGISTER BITS

COMMAND

POWER-UP

BYTE

PROTOCOL

DEFAULT

(HEX)

Input Port

Read byte

xxxx xxxx(1)

Output Port

Read/write byte

1111 1111

Polarity Inversion

Read/write byte

0000 0000

Configuration

Read/write byte

1111 1111

(1)

Undefined

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