Block Guide — S12BDM V4

14

NOTE:

The BDM alternate clock source can only be selected when CLKSW = 0 and

PLLSEL = 1. The BDM serial interface is now fully synchronized to the alternate

clock source, when enabled. This eliminates frequency restriction on the alternate

clock which was required on previous versions. Refer to the device specification to

determine which clock connects to the alternate clock source input.

NOTE:

If the acknowledge function is turned on, changing the CLKSW bit will cause the

ACK to be at the new rate for the write command which changes it.

UNSEC — Unsecure

This bit is only writable in special single-chip mode from the BDM secure firmware and always gets

reset to zero. It is in a zero state as secure mode is entered so that the secure BDM firmware lookup

table is enabled and put into the memory map along with the standard BDM firmware lookup table.

The secure BDM firmware lookup table verifies that the on-chip EEPROM and FLASH EEPROM are

erased. This being the case, the UNSEC bit is set and the BDM program jumps to the start of the

standard BDM firmware lookup table and the secure BDM firmware lookup table is turned off. If the

erase test fails, the UNSEC bit will not be asserted.

1 = System is in a unsecured mode

0 = System is in a secured mode

NOTE:

When UNSEC is set, security is off and the user can change the state of the secure

bits in the on-chip FLASH EEPROM. Note that if the user does not change the state

of the bits to “unsecured” mode, the system will be secured again when it is next

taken out of reset.

Table 3-2 BDM Clock Sources

PLLSEL

CLKSW

BDMCLK

0

0

Bus clock

0

1

Bus clock

10

Alternate clock (refer to the device specification to determine

the alternate clock source)

1

1

Bus clock dependent on the PLL