PCF2123TS datasheet(25/55 Pages) NXP

25 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

25 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

If the MSF ﬂag is cleared before the end of the INT pulse, then the INT pulse is shortened.

This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,

the system does not have to wait for the completion of the pulse before continuing; see

Figure 18. Instructions for clearing MSF are given in Section 9.8.5.

The timing shown for clearing bit MSF in Figure 18 is also valid for the non-pulsed

interrupt mode i.e. when bit TI_TP = 0, INT may be shortened by setting both MI and SI or

MSF to logic 0.

9.9.2 Countdown timer interrupts

The generation of interrupts from the countdown timer is controlled via bit TIE.

The pulse generator for the countdown timer interrupt also uses an internal clock, but this

time it is dependent on the selected source clock for the countdown timer and on the

countdown value n. As a consequence, the width of the interrupt pulse varies (see

Table 34).

[1]

n = loaded countdown value. Timer stopped when n = 0.

If the TF ﬂag is cleared before the end of the INT pulse, then the INT pulse is shortened.

This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,

the system does not have to wait for the completion of the pulse before continuing (see

Figure 19). Instructions for clearing MSF can be found in Section 9.8.5.

(1) Indicates normal duration of INT pulse (bit TI_TP = 1)

Fig 18. Example of shortening the INT pulse by clearing the MSF ﬂag

001aaf908

seconds counter

MSF

INT

SCL

instruction

CLEAR INSTRUCTION

8th clock

(1)

Table 34.

INT operation (bit TI_TP = 1)

Source clock (Hz)

INT period (s)

n = 1[1]

n > 1

4096

⁄

8192

⁄

4096

⁄

128

⁄

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