PCA9633DP2 datasheet(16/43 Pages) NXP

16 / 43 page

PCA9633_5

Product data sheet

Rev. 05 — 25 July 2008

16 of 43

NXP Semiconductors

PCA9633

4-bit Fm+ I2C-bus LED driver

7.4 Active LOW output enable input

The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at

the same time.

This control signal is only available for the 16-pin version and does not apply to the 8-pin

or 10-pin versions.

• When a LOW level is applied to OE pin, all the LED outputs are enabled and follow the

output state deﬁned in the LEDOUT register with the polarity deﬁned by INVRT bit

(MODE2 register).

• When a HIGH level is applied to OE pin, all the LED outputs are programmed to the

value that is deﬁned by OUTNE[1:0] in the MODE2 register.

The OE pin can be used as a synchronization signal to switch on/off several PCA9633

devices at the same time. This requires an external clock reference that provides blinking

period and the duty cycle.

The OE pin can also be used as an external dimming control signal. The frequency of the

external clock must be high enough not to be seen by the human eye, and the duty cycle

value determines the brightness of the LEDs.

Remark: Do not use OE as an external blinking control signal when internal global

blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undeﬁned

blinking pattern. Do not use OE as an external dimming control signal when internal global

dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undeﬁned

dimming pattern.

7.5 Power-on reset

When power is applied to VDD, an internal Power-on reset holds the PCA9633 in a reset

condition until VDD has reached VPOR. At this point, the reset condition is released and the

PCA9633 registers and I2C-bus state machine are initialized to their default states (all

zeroes) causing all the channels to be deselected. Thereafter, VDD must be lowered below

0.2 V to reset the device.

Table 16.

LED outputs when OE=1

OUTNE1

OUTNE0

LED outputs

000

1 if OUTDRV = 1, high-impedance if OUTDRV = 0

high-impedance

reserved

PCA9633DP2 bảng dữ liệu(PDF) 16 Page - NXP Semiconductors

PCA9633DP2 bảng dữ liệu(HTML) 16 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

bảng dữ liệu tải về

Link URL