P89LPC913 datasheet(38/66 Pages) NXP

38 / 66 page

P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

38 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Reset can be triggered from the following sources:

• External reset pin (during power-up or if user conﬁgured via UCFG1. This option must

be used for an oscillator frequency above 12 MHz.)

• Power-on detect

• Brownout detect

• Watchdog timer

• Software reset

• UART break character detect reset (P89LPC913, P89LPC914).

For every reset source, there is a ﬂag in the Reset Register, RSTSRC. The user can read

this register to determine the most recent reset source. These ﬂag bits can be cleared in

software by writing a logic 0 to the corresponding bit. More than one ﬂag bit may be set:

• During a power-on reset, both POF and BOF are set but the other ﬂag bits are

cleared.

• For any other reset, previously set ﬂag bits that have not been cleared will remain set.

8.16 Timers/counters 0 and 1

The P89LPC912/913/914 devices have two general purpose counter/timers which are

upward compatible with the standard 80C51 Timer 0 and Timer 1. An option to

automatically toggle the T0 pin upon timer overﬂow has been added (P89LPC912,

P89LPC914). In the ‘Timer’ function, the register is incremented every machine cycle. In

the ‘Counter’ function, the register of Timer 0 is incremented in response to a 1-to-0

transition at its external input pin, T0. This external input is sampled once very machine

cycle.

Timer 0 has four operating modes (modes 0, 1, 2, and 3) on the P89LPC913).

Timer 0 has ﬁve operating modes (modes 0, 1, 2, 3, and 6 on the P89LPC912 and

P89LPC914.

Timer 1 has four operating modes (modes 0, 1, 2, and 3) on all devices. Modes 0, 1, and 2

are the same for both Timers/Counters. Mode 3 is different.

8.16.1 Mode 0

Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit

Counter with a divide-by-32 prescaler. In this mode, the Timer register is conﬁgured as a

13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.

8.16.2 Mode 1

Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.

8.16.3 Mode 2

Mode 2 conﬁgures the Timer register as an 8-bit Counter with automatic reload. Mode 2

operation is the same for Timer 0 and Timer 1.

P89LPC913 bảng dữ liệu(PDF) 38 Page - NXP Semiconductors

P89LPC913 bảng dữ liệu(HTML) 38 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

bảng dữ liệu tải về

Link URL