LPC3230 datasheet(3/73 Pages) NXP

3 / 73 page

LPC3220_30_40_50_1

Preliminary data sheet

Rev. 01 — 6 February 2009

3 of 73

NXP Semiconductors

LPC3220/30/40/50

16/32-bit ARM microcontrollers

N WatchDog timer clocked by the peripheral clock.

N Two single-output PWM blocks.

N Motor control PWM

N Keyboard scanner function allows automatic scanning of an up to 8 × 8 key matrix.

N Up to 18 external interrupts.

I Standard ARM test/debug interface for compatibility with existing tools.

I Emulation Trace Buffer (ETB) with 2048 × 24 bit RAM allows trace via JTAG.

I Stop mode saves power while allowing many peripheral functions to restart CPU

activity.

I On-chip crystal oscillator.

I An on-chip PLL allows CPU operation up to the maximum CPU rate without the

requirement for a high frequency crystal. Another PLL allows operation from the

32 kHz RTC clock rather than the external crystal.

I Boundary scan for simpliﬁed board testing.

I 296 pin TFBGA package with a 15 × 15 × 0.7 mm body.

Applications

I Consumer

I Medical

I Industrial

I Network control

Ordering information

[1]

F =

−40 °C to +85 °C temperature range.

4.1 Ordering options

Table 1.

Ordering information

Type number[1]

Package

Name

Description

Version

LPC3220FET296

TFBGA296

plastic thin ﬁne-pitch ball grid array package; 296 balls SOT1048-1

LPC3230FET296

TFBGA296

plastic thin ﬁne-pitch ball grid array package; 296 balls SOT1048-1

LPC3240FET296

TFBGA296

plastic thin ﬁne-pitch ball grid array package; 296 balls SOT1048-1

LPC3250FET296

TFBGA296

plastic thin ﬁne-pitch ball grid array package; 296 balls SOT1048-1

Table 2.

Part options

Type number

SRAM (kB)

10/100 Ethernet

LCD controller Temperature range (

°C)

Package

LPC3220FET296

128

−40 to +85

TFBGA296

LPC3230FET296

256

−40 to +85

TFBGA296

LPC3240FET296

256

−40 to +85

TFBGA296

LPC3250FET296

256

−40 to +85

TFBGA296

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