Advanced Information

WM8722

WOLFSON MICROELECTRONICS LTD

AI Rev 1.5 May 2000

11

SYSTEM CLOCK FREQUENCY (MHZ)

SAMPLING RATE

(LRCIN)

256fs

384fs

32kHz

8.192

12.288

44.1kHz

11.2896

16.9340

48kHz

12.288

18.432

96kHz

24.576

36.864

Table 1 System Clock Frequencies versus Sampling Rate

AUDIO DATA INTERFACE

The serial data interface to WM8722 is fully compatible with both normal (MSB first, right-justified) or

I

number of data bits, i.e. normally 32 in 16 bit mode) or unpacked (more than 32 BCLKs per LRCIN

period.

The WM8722 will automatically detect 16-bit packed data being sent to the device in normal mode,

and accept the data in this input format accordingly.

I

DESCRIPTION

0

Normal format (MSB-first, right justified)

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Table 2. Serial Interface Formats

MSB

MSB

LSB

LSB

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

12

3

n

n-1

n-2

123

n

n-1

n-2

Figure 5. Normal Data Input Timing

MSB

MSB

LSB

LSB

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

123

n

n-1

n-2

123

n

n-1

n-2

Figure 6. I