| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PAC107 bảng dữ liệu(PDF) 28 Page - Pixart Imaging Inc. |
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PAC107 bảng dữ liệu(HTML) 28 Page - Pixart Imaging Inc. |
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28 / 53 page ![]() PixArt Imaging Inc. PAC107 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. 28 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw V1.4, Aug, 2005 Interrupt Priority PAC107 has 2 level priorities. Setting / clearing a bit in the Interrupt Priority register (IP) or Extent Interrupt Priority register (EIP) established its associated interrupt request as a high / low priority. If a low-priority level interrupt is being serviced, a high-priority level interrupt will interrupt it. However, an interrupt source cannot interrupt a service program of the same or higher level. The interrupt priority is shown on Interrupt Control System Configuration. Interrupt Response Time The minimum interrupt response time is eight clocks that when an interrupt request asserts as last instruction executed. The maximum interrupt response time is 24 clocks. DJNZ direct, rel or others instruction sets which operation period is 16 clocks, is decoded ok. When a high priority interrupt asserts during a low priority interrupt service program, the minimum and maximum interrupt response times are 8 clocks and 24 clocks. OSC Call ISR Push PC Ending Instructions Interrupt Vector address Interrupt Response Time Interrupt Response Time INT0 or INT1 |
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