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AM1808AZCE4 bảng dữ liệu(PDF) 72 Page - Texas Instruments

tên linh kiện AM1808AZCE4
Giải thích chi tiết về linh kiện  AM1808 ARM Microprocessor
PDF  264 Pages
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Trang chủ  http://www.ti.com
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AM1808AZCE4 bảng dữ liệu(HTML) 72 Page - Texas Instruments

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OSCIN
RESET
RESETOUT
BootPins
Config
Power
Supplies
Ramping
PowerSuppliesStable
ClockSourceStable
1
2
3
4
TRST
AM1808
SPRS653 – FEBRUARY 2010
www.ti.com
6.4.3
Reset Electrical Data Timings
Table 6-1 assumes testing over the recommended operating conditions.
Table 6-1. Reset Timing Requirements ((1), (2))
1.3V, 1.2V
1.1V
1.0V
NO.
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
1
tw(RSTL)
Pulse width, RESET/TRST low
100
100
100
ns
2
tsu(BPV-RSTH)
Setup time, boot pins valid before RESET/TRST high
20
20
20
ns
3
th(RSTH-BPV)
Hold time, boot pins valid after RESET/TRST high
20
20
20
ns
td(RSTH-RESETOUTH) RESET high to RESETOUT high; Warm reset
14
16
20
cycles(3)
4
RESET high to RESETOUT high; Power-on Reset
14
16
20
5
td(RSTL-RESETOUTL) Delay time, RESET/TRST low to RESETOUT low
14
16
20
ns
(1)
RESETOUT is multiplexed with other pin functions. See the Terminal Functions table, Table 3-3 for details.
(2)
For power-on reset (POR), the reset timings in this table refer to RESET and TRST together. For warm reset, the reset timings in this
table refer to RESET only (TRST is held high).
(3)
OSCIN cycles.
Figure 6-4. Power-On Reset (RESET and TRST active) Timing
72
Peripheral Information and Electrical Specifications
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): AM1808



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