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AS8218 bảng dữ liệu(PDF) 78 Page - ams AG |
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AS8218 bảng dữ liệu(HTML) 78 Page - ams AG |
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78 / 123 page ![]() Data Sheet AS8218 / AS8228 Revision 3.0, 31-May-06 Page 78 of 123 UART2 ............ serial interface RS232 with extended baudrate generator SQRT .............. square root calculation out of 5 bytes (40 bits) input, 2.5 bytes (20 bits) output SPI.................. serial peripheral interface, used to access an external EEPROM Bootload .......... downloads program data after reset, combined with the SPI LCDD .............. LCD driver block RTC ................ real time clock, time/data may be set via UART1 (SCT) MPIO............... multi-purpose I/O pins, configurable inputs and outputs DSP ................ digital signal processing unit interfaces to analog front end (AFE) AFE................. analog front end, includes amplifiers and A to D converters SCT ................ system control unit, combined with UART1 used for debugging/programming of the device Key Features - 8051 compatible 8 bit oriented microcontroller core - 128 bytes of internal data memory (I_RAM) - 24kB program memory (P_RAM) - 1kB data memory (X_RAM) - Von Neumann architecture, shared program and data memory - Cycle optimized compared to standard 8051, some instructions are executed in a single clock cycle - 128 bytes of SFR range - Standard SFRs: Timer 0, UART1 (with 16 baudrate reg.) - Specific SFRs: UART2 (with 16 bit baudrate reg.), SQRT block - Fully compatible 8051 instruction set including DA, MUL and DIV instruction - 7 internal interrupt sources - Ports P0, P1, P2, P3 are not implemented - P0 and P2 are accessible as registers - Register PCON is not implemented - No idle mode via PCON - Automatic bootload of application program after power-on reset - 6 clock cycles per instruction (12 cycles in standard 8051) - 1 data pointer DPTR |
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