ATmega64A datasheet(108/392 Pages) ATMEL

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108

8160C–AVR–07/09

ATmega64A

14.11.2

TCNT0 – Timer/Counter Register

The Timer/Counter Register gives direct access, both for read and write operations, to the

Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare

Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,

introduces a risk of missing a Compare Match between TCNT0 and the OCR0 Register.

14.11.3

OCR0 – Output Compare Register

The Output Compare Register contains an 8-bit value that is continuously compared with the

counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to

generate a waveform output on the OC0 pin.

14.11.4

ASSR – Asynchronous Status Register

• Bit 3 – AS0: Asynchronous Timer/Counter0

When AS0 is written to zero, Timer/Counter0 is clocked from the I/O clock, clk

I/O. When AS0 is

written to one, Timer/Counter 0 is clocked from a crystal Oscillator connected to the Timer Oscil-

lator 1 (TOSC1) pin. When the value of AS0 is changed, the contents of TCNT0, OCR0, and

TCCR0 might be corrupted.

Table 14-6.

Clock Select Bit Description

CS02

CS01

CS00

Description

No clock source (Timer/counter stopped)

001

clkT0S/(No prescaling)

010

clkT0S/8 (From prescaler)

011

clkT0S/32 (From prescaler)

100

clkT0S/64 (From prescaler)

101

clkT0S/128 (From prescaler)

110

clkT0S/256 (From prescaler)

111

clk

0S/1024 (From prescaler)

Bit

765

43210

0x32 (0x52)

TCNT0[7:0]

TCNT0

Read/Write

R/W

Initial Value

000

00000

Bit

6543210

0x31 (0x51)

OCR0[7:0]

OCR0

Read/Write

R/W

Initial Value

0000000

Bit

0x30 (0x50)

–

AS0

TCN0UB

OCR0UB

TCR0UB

ASSR

Read/Write

R/W

Initial Value

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