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ATtiny167-ESSZ bảng dữ liệu(PDF) 30 Page - ATMEL Corporation |
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ATtiny167-ESSZ bảng dữ liệu(HTML) 30 Page - ATMEL Corporation |
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30 / 282 page ![]() 30 7728D–AVR–07/09 ATtiny87/ATtiny167 Figure 4-3. Low-frequency Crystal Oscillator Connections When this oscillator is selected, start-up times are determined by the SUT fuses or by CSUT field as shown in Table 4-8. Notes: 1. Flash Fuse bits. 2. CLKSELR register bits. 3. These options should only be used if frequency stability at start-up is not important for the application. 4.2.6 External Clock To drive the device from this external clock source, CLKI should be driven as shown in Figure 4-4. To run the device on an external clock, the CKSEL Fuses or CSEL field must be pro- grammed as shown in Table 4-1 on page 25. Figure 4-4. External Clock Drive Configuration When this clock source is selected, start-up times are determined by the SUT Fuses or CSUT field as shown in Table 4-9. This external clock can be used by the asynchronous timer if the high or low frequency Crystal Oscillator is not running (See ”Enable/Disable Clock Source” on page 32.). The asynchronous timer is then able to enable this input. Table 4-8. Start-up Times for the Low Frequency Crystal Oscillator Clock Selection SUT1..0(1) CSUT1..0(2) Start-up Time from Power-down/save Additional Delay from Reset (Vcc = 5.0V) Recommended usage 00 1K (1024) CK(3) 4.1 ms Fast rising power or BOD enabled 01 1K (1024) CK(3) 65 ms Slowly rising power 10 32K (32768) CK 65 ms Stable frequency at start-up 11 Reserved XTAL2 XTAL1 GND C1=12-22 pF 32.768 KHz 12-22 pF capacitors may be necessary if parasitic impedance (pads, wires & PCB) is very low. C2=12-22 pF (XTAL2) (CLKO) CLKI (XTAL1) GND ~ External Clock Signal |
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