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R5F6411FDFP bảng dữ liệu(HTML) 61 Page - Renesas Technology Corp |
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61 / 105 page  REJ03B0227-0110 Rev.1.10 Sep 17, 2009 Page 61 of 99 R32C/111 Group 5. Electrical Characteristics Notes: 1. The device is operationally guaranteed under these operating conditions. 2. The VCC2 pin is available in the 100-pin package only. It should be considered as VCC1 in the 80-/64- pin package. 3. VIH and VIL for P8_7 are specified for P8_7 as a programmable port. These values are not applicable to P8_7 as XCIN. 4. Ports P0_4 to P0_7, P1_0 to P1_4, P3_4 to P3_7, and P9_5 to P9_7 are available in the 100- and 80-pin packages. Ports P4, P5, P9_1, and P9_4 are available in the 100-pin package only. 5. Memory expansion mode and microprocessor mode are available in the 100-pin package only. Table 5.2 Operating Conditions (1) (1) Symbol Characteristic Value (2) Unit Min. Typ. Max. VCC1, VCC2 Digital supply voltage (VCC1 ≥ VCC2) 3.0 5.0 5.5 V AVCC Analog supply voltage VCC1 V VREF Reference voltage 3.0 VCC1 V VSS Digital ground voltage 0V AVSS Analog ground voltage 0V dVCC1/dt VCC1 ramp up rate (VCC1 < 2.0 V) 0.05 V/ms VIH High level input voltage P2_0 to P2_7,P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7 (4) 0.8 × VCC2 VCC2 V XIN, RESET, CNVSS, NSD, P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_7 (3), P9_1, P9_3 to P9_7, P10_0 to P10_7 (4) 0.8 × VCC1 VCC1 V P7_0, P7_1 0.8 × VCC1 6.0 V P0_0 to P0_7, P1_0 to P1_7 (in single-chip mode) (4) 0.8 × VCC2 VCC2 V P0_0 to P0_7, P1_0 to P1_7 (in memory expansion mode or microprocessor mode) (4, 5) 0.5 × VCC2 VCC2 V VIL Low level input voltage P2_0 to P2_7,P3_0 to P3_7, P4_0 to P4_7, P5_0 to P5_7 (4) 0 0.2 × VCC2 V XIN, RESET, CNVSS, NSD, P6_0 to P6_7, P7_0 to P7_7, P8_0 to P8_7 (3), P9_1, P9_3 to P9_7, P10_0 to P10_7 (4) 0 0.2 × VCC1 V P0_0 to P0_7, P1_0 to P1_7 (in single-chip mode) (4) 0 0.2 × VCC2 V P0_0 to P0_7, P1_0 to P1_7 (in memory expansion mode or microprocessor mode) (4, 5) 0 0.16 × VCC2 V Topr Operating temperature range Version N -20 85 °C Version D -40 85 °C |
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