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SN75DP120RHHT bảng dữ liệu(PDF) 13 Page - Texas Instruments |
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SN75DP120RHHT bảng dữ liệu(HTML) 13 Page - Texas Instruments |
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13 / 27 page ![]() GND 100KW CAD= 0 AUX+ AUX- 50 W 3.3V GND 2.5- 3.3V SinkConnector 1MW 50 W 75-200nF SourceConnector SN75DP120 AUX+ AUX- 75-200nF 50 W 75-200nF 75-200nF 50 W 100KW 1MW SN75DP120 www.ti.com SLLSE08 – OCTOBER 2009 Figure 6. Auxiliary Channel Measurement DisplayPort Main Link Pins The SN75DP120 is designed to support DisplayPort’s high speed differential main link with four levels of output voltage swing and four levels of pre-emphasis. The main link I/Os of the SN75DP120 are designed to be compliant to the DisplayPort 1.1a specification. ELECTRICAL CHARACTERISTICS over recommended operating (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTx (Mainlink Outputs) Output differential peak-to-peak VODpp(1) 400 mVp-p voltage Level 1 VODpp(2) Output differential peak-to-peak 600 mVp-p voltage Level 2 PRBS7 pattern at 1.67 Gbps and 2.7 Gbps, Measured at TP1 in Figure 8 Output differential peak-to-peak VODpp(3) 800 mVp-p voltage Level 3 Output differential peak-to-peak VODpp(4) 1200 mVp-p voltage Level 4 Output differential peak-to-peak VODpp(5) CAD_SINK = 3.6V 600 mVp-p voltage TMDS mode Level 3 (800mVpp), 1.67 Gbps 400 Output differential peak-to-peak Pattern used is PRBS7, VODpp(CTS1.1) mVp-p voltage for DP Compliance v1.1 Measured at TP2 in Figure 8, 2.7 Gbps 350 Per Eye Mask Test in CTS1.1 Output differential peak-to-peak ΔVODpp1 voltage increase from Level 1 to 1.8 3.3 5.0 dB Level 2 Output differential peak-to-peak Measured at TP2, ΔVODpp2 voltage increase from Level 2 to ΔVODppn = 20*log(VODpp2(n+1) / VODpp2(n)), 1.1 2.7 4.1 dB Level 3 Refer to Section 3.2 in DP CTS1.1 Output differential peak-to-peak ΔVODpp3 voltage increase from Level 3 to 1.8 3.4 5.0 dB Level 4 Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): SN75DP120 |
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