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SC9RS08KA2 bảng dữ liệu(PDF) 93 Page - Freescale Semiconductor, Inc

tên linh kiện SC9RS08KA2
Giải thích chi tiết về linh kiện  RS08 Microcontrollers
PDF  134 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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SC9RS08KA2 bảng dữ liệu(HTML) 93 Page - Freescale Semiconductor, Inc

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Modulo Timer (RS08MTIMV1)
SC9RS08KA2 Series Data Sheet, Rev. 1
Freescale Semiconductor
93
11.3.2
MTIM Clock Configuration Register (MTIMCLK)
MTIMCLK contains the clock select bits (CLKS) and the prescaler select bits (PS).
11.3.3
MTIM Counter Register (MTIMCNT)
MTIMCNT is the read-only value of the current MTIM count of the 8-bit counter.
7
6
5
432
1
0
R
0
0
CLKS
PS
W
Reset:
0
0
0
0
0
0
0
0
Figure 11-4. MTIM Clock Configuration Register (MTIMCLK)
Table 11-4. MTIMCLK Field Description
Field
Description
5:4
CLKS
Clock Source Select — These two read/write bits select one of four different clock sources as the input to the
MTIM prescaler. Changing the clock source while the counter is active does not clear the counter. The count
continues with the new clock source. Reset clears CLKS to 00.
00
Encoding 0 — Bus clock (BUSCLK).
01
Encoding 1 — Fixed-frequency clock (XCLK).
10
Encoding 3 — External source (TCLK pin), falling edge.
11
Encoding 4 — External source (TCLK pin), rising edge.
3:0
PS
Clock Source Prescaler — These four read/write bits select one of nine outputs from the 8-bit prescaler.
Changing the prescaler value while the counter is active does not clear the counter. The count continues with the
new prescaler value. Reset clears PS to 0000.
0000 Encoding 0 — MTIM clock source
÷ 1.
0001 Encoding 1 — MTIM clock source
÷ 2.
0010 Encoding 2 — MTIM clock source
÷ 4.
0011 Encoding 3 — MTIM clock source
÷ 8.
0100 Encoding 4 — MTIM clock source
÷ 16.
0101 Encoding 5 — MTIM clock source
÷ 32.
0110 Encoding 6 — MTIM clock source
÷ 64.
0111 Encoding 7 — MTIM clock source
÷ 128.
1000 Encoding 8 — MTIM clock source
÷ 256.
All other encodings default to MTIM clock source
÷ 256.
7
6
5
432
1
0
R
COUNT
W
Reset:
0
0
0
0
0
0
0
0
Figure 11-5. MTIM Counter Register (MTIMCNT)



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