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MPC2F35E2 bảng dữ liệu(PDF) 5 Page - Megawin Technology Co., Ltd |
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MPC2F35E2 bảng dữ liệu(HTML) 5 Page - Megawin Technology Co., Ltd |
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5 / 46 page ![]() MEGAWIN MPC2F35_USB Data Sheet 5 FUNCTION DESCRIPTION Registers A Y X P PCH PCL 1 S Accumulator The accumulator is a 8-bit register, which stores the results of most arithmetic and logic operations. In addition, the accumulator usually contains one of two data words used in these operations. Index Register (X, Y) There are two 8-bit index registers (X and Y), which may be used to count program steps or to provide an index value to be used in generating an effective address. When executing an instruction, which specifies indexed addressing, the MCU fetches the OP Code and the base address, and modifies the address by adding the index register to the base address before performing the desired operation. Pre- or post-index of index address is possible. Processor Status Register (P) The 8-bit processor status register contains seven status flags. Some flags are controlled by the program, and others may be controlled by both the program and the MCU. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 N V 1 B D I Z C N: Signed flag, 1 = negative, 0 = positive V: Overflow flag, 1 = true, 0 = false B: BRK interrupt command, 1 = BRK, 0 = IRQB D: Decimal mode, 1 = true, 0 = false I: IRQB disable flag, 1 = disable, 0 = enable Z: Zero flag, 1 = true, 0 = false C: Carry flag, 1 = true, 0 = false Program Counter (PC) The 16-bit program counter register provides the addresses, which steps MPC2F35 through the sequential program instructions. Each time this MCU fetches an instruction from program memory, the lower byte of the program counter (PCL) is placed on the low-order 8 bits of the address bus, and the higher byte of the program counter (PCH) is placed on the high-order 8 bits. The counter is incremented each time when an instruction or data is fetched from program memory. |
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