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TPS51113 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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TPS51113 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 26 page ![]() PACKAGE DISSIPATION RATINGS RECOMMENDED OPERATING CONDITIONS TPS51113, TPS51163 www.ti.com........................................................................................................................................................................................................ SLUS864 – MAY 2009 RθJA HIGH-K BOARD (1) POWER RATING (W) POWER RATING (W) PACKAGE AIRFLOW (LFM) (°C/W) TA = 25°C TA = 85°C 0 (natural convection) 47.9 2.08 0.835 DRC 200 40.5 2.46 0.987 400 38.2 2.61 1.04 (1) Ratings based on JEDEC High Thermal Conductivity (High K) Board. For more information on the test method, see TI Technical Brief (SZZA017). (unless otherwise noted, all voltages are with respect to GND) MIN TYP MAX UNIT VDD –0.1 13.2 BOOT –0.1 28.0 BOOT, to SW (negative overshoot –5 V for t < 25 ns, –3.0 13.2 Supply voltages 125 V × ns/t for 25 ns < t< 100 ns) V BOOT, (negative overshoot –5 V for t < 25 ns, –3.0 35.0 125 V × ns/t for 25 ns < t < 100 ns) All other pins –0.1 3.0 SW –0.1 20.0 SW, (negative overshoot –5 V for t < 25 ns, –3.0 28.0 125 V × ns/t for 25 ns < t < 100 ns) HDRV –0.1 28.0 HDRV to SW (negative overshoot –5 V for t < 25 ns, –3.0 13.2 125 V × ns/t for 25 ns < t< 100 ns) Output voltages HDRV (negative overshoot –5 V for t < 25 ns, V –3.0 35.0 125 V × ns/t for 25 ns < t < 100 ns) LDRV_OC –0.1 13.2 LDRV_OC (negative overshoot –5 V for t < 25 ns, –3.0 13.2 125 V × ns/t for 25 ns < t < 100 ns) PGOOD –0.1 13.2 All other pins –0.1 3.0 TA Operating ambient temperature –40 85 °C Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s) :TPS51113 TPS51163 |
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