UDG-08110

+

COMP

C1

22 nF

R2

2.7 k

W

C2

3.9 nF

R

BIAS

2 k

W

C3

8.2 nF

R3

130

W

R1

V

REF

V

OUT

FB

( )

(

)

(

)

(

)

(

)

(

)

2

1

1

3

3

2

1

2

1

1

2

3

3

1

2

sR C

1

s R

R

C

1

G s

R C C

sR

C

C

s

1

sR C

1

C

C

+

´

+

+

=

æ

ö

æ

ö

+

´

+

´

+

ç

÷

ç

÷

ç

÷

+

è

ø

è

ø

(36)

Z1

2

1

1

f

2.7 kHz

2

R

C

=

=

p ´

´

(37)

(

)

Z2

1

3

3

1

f

9.2kHz

2

R

R

C

=

=

p ´

+

´

(38)

(

)

(

)

P1

1

2

2

1

2

1

f

17.8 kHz

C

C

2

R

C

C

=

=

æ

ö

´

p ´

´ ç

÷

ç

÷

+

è

ø

(39)

P2

3

3

1

f

149.4 kHz

2

R

C

=

=

p ´

´

(40)

(

)

C

1

1

2

1

f

3.1kHz

2

R

C

C

=

=

p ´

´

+

(41)

1

BIAS

O

0.8

R

R

2k

V

0.8

´

=

=

W

-

(42)

TPS51113, TPS51163

Figure 10 shows the detailed parameters used for the Type III compensation. Also, poles and zeros for the Type

III network are derived based on Equation 22 through Equation 26.

Figure 10. Parameters for Type III Compensation Network

Based on Equation 42 and the power stage parameters, the bode-plot by simulation is shown in Figure 10

approximately 60°.

Copyright © 2009, Texas Instruments Incorporated

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