PCM1795DB datasheet(19/58 Pages) TI

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AUDIO DATA INTERFACE

Audio Serial Interface

PCM Audio Data Formats and Timing

DATA

(BCH)

1.4V

BCK

LRCK

(BCL)

(LB)

(BCY)

(DS)

(DH)

1.4V

(BL)

PCM1795

www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009

The audio interface port is a three-wire serial port. It includes LRCK (pin 4), BCK (pin 6), and DATA (pin 5). BCK

is the serial audio bit clock, and it is used to clock the serial data present on DATA into the serial shift register of

the audio interface. Serial data are clocked into the PCM1795 on the rising edge of BCK. LRCK is the serial

audio left/right word clock.

The PCM1795 requires the synchronization of LRCK and the system clock, but does not need a specific phase

relation between LRCK and the system clock.

If the relationship between LRCK and the system clock changes more than ±6 BCK, internal operation is

initialized within 1/fS and analog outputs are forced to the bipolar zero level until resynchronization between

LRCK and the system clock is completed.

The PCM1795 supports industry-standard audio data formats, including standard right-justified, I2S, and

left-justified. The data formats are illustrated in Figure 38 to Figure 40. Data formats are selected using the

format bits, FMT[2:0], in control register 18. The default data format is 32-bit I2S. All formats require binary twos

complement, MSB-first audio data. Figure 37 and Table 5 show a detailed timing diagram for the serial audio

interface.

Figure 37. Audio Interface Timing

Table 5. Timing Characteristics for Figure 37

PARAMETER

MIN

MAX

UNIT

t(BCY)

BCK pulse cycle time

t(BCL)

BCK pulse duration, low

t(BCH)

BCK pulse duration, high

t(BL)

BCK rising edge to LRCK edge

t(LB)

LRCK edge to BCK rising edge

t(DS)

DATA setup time

t(DH)

DATA hold time

—

LRCK clock data

50% ± 2 bit clocks

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