TMS370 datasheet(13/60 Pages) TI

13 / 60 page

TMS370Cx2x

8-BIT MICROCONTROLLER

SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

interrupts

The TMS370 family software-programmable interrupt structure supports flexible on-chip and external-interrupt

configurations to meet real-time interrupt-driven application requirements. The hardware-interrupt structure

incorporates two priority levels as shown in Figure 4. Interrupt level 1 has a higher priority than interrupt

level 2. The two priority levels can be enabled independently by the global-interrupt enable bits (IE1 and IE2)

of the status register.

Each system interrupt is configured independently on either the high- or low-priority chain by the application

program during system initialization. Within each interrupt chain, the interrupt priority is fixed by the position of

the system interrupt. However, since each system interrupt is configured selectively on either the high- or

low-priority interrupt chain, the application program can elevate any system interrupt to the highest priority.

Arbitration between the two priority levels is performed within the CPU. Arbitration within each of the priority

chains is performed within the peripheral modules to support interrupt expansion to future modules. Pending

interrupts are serviced upon completion of current instruction execution, depending on their interrupt mask and

priority conditions.

The TMS370Cx2x has seven hardware system interrupts (plus RESET) as shown in Table 8. Each system

interrupt has a dedicated interrupt vector located in program memory through which control is passed to the

interrupt service routines. A system interrupt can have multiple interrupt sources (e.g., SCI RXNT has two

interrupt sources). All of the interrupt sources are individually maskable by local interrupt-enable control bits in

the associated peripheral file. Each interrupt source FLAG bit is individually readable for software polling or for

determining which interrupt source generated the associated system interrupt.

TMS370 bảng dữ liệu(PDF) 13 Page - Texas Instruments