AX2000-1CSG896B datasheet(56/226 Pages) ACTEL

tên linh kiện	AX2000-1CSG896B

Giải thích chi tiết về linh kiện	Axcelerator Family FPGAs

PDF	226 Pages

Scroll/Zoom	100%

nhà sản xuất	ACTEL [Actel Corporation]

Trang chủ	http://www.actel.com

Logo

56 / 226 page

Axcelerator Family FPGAs

2- 42

v2.7

Timing Characteristics

Table 2-60 • LVPECL I/O Module

Worst-Case Commercial Conditions VCCA = 1.425V, VCCI = 3.0V, TJ = 70°C

'–2' Speed

'–1' Speed

'Std' Speed

Parameter

Description

Min.

Max.

Min.

Max.

Min.

Max.

Units

LVPECL Output Module Timing

tDP

Input Buffer

1.70

1.93

2.28

tPY

Output Buffer

2.28

2.60

3.06

tICLKQ

Clock-to-Q for the I/O input register

0.67

0.77

0.90

tOCLKQ

Clock-to-Q for the IO output register and the I/O

enable register

0.67

0.77

0.90

tSUD

Data Input Set-Up

0.23

0.27

0.31

tSUE

Enable Input Set-Up

0.26

0.30

0.35

tHD

Data Input Hold

0.00

tHE

Enable Input Hold

0.00

tCPWHL

Clock Pulse Width High to Low

0.43

0.48

0.57

tCPWLH

Clock Pulse Width Low to High

0.45

0.51

0.60

tWASYN

Asynchronous Pulse Width

0.43

0.48

0.57

tREASYN

Asynchronous Recovery Time

0.10

tHASYN

Asynchronous Removal Time

0.00

tCLR

Asynchronous Clear-to-Q

0.23

0.27

0.31

tPRESET

Asynchronous Preset-to-Q

0.23

0.27

0.31

AX2000-1CSG896B bảng dữ liệu(PDF) 56 Page - Actel Corporation

AX2000-1CSG896B bảng dữ liệu(HTML) 56 Page - Actel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL