SC1486ITSTRT datasheet(11/17 Pages) SEMTECH

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 2002 Semtech Corp.

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SC1486

POWER MANAGEMENT

Power Good Output

Each controller has its own PGOOD. Power good is an

open-drain output and requires a pull-up resistor. When

the output voltage is 10% above or below its set voltage,

PGOOD gets pulled low. It is held low until the output

voltage returns to within 10% of the output set voltage.

PGOOD is also held low during start-up and will not be

allowed to transition high until soft start is over and the

output reaches 90% of its set voltage. There is a 2us

delay built into the PGOOD circuit to prevent false transi-

tions.

Output Overvoltage Protection

When the output exceeds 10% of the its set voltage the

low-side MOSFET is latched on. It stays latched and the

SMPS is off until the enable input, REFIN or VCCA is

toggled. There is a 2us delay built into the OV protection

circuit to prevent false transitions. A OV fault in either

controller will not cause the other one to shutdown. Note:

to reset VDDQ from a fault, VCCA1 or EN/PSV must be

togled. To reset VTT from a fault, VCCA2 or REFIN must

be togled.

Output Undervoltage Protection

When the output is 30% below its set voltage the output

is latched in a tristated condition, and the SMPS is off

until the enable input is toggled. There is a 2us delay

built into the UV protection circuit to prevent false transi-

tions. An UV fault in either controller will not effect the

other controller.

POR, UVLO and Softstart

An internal power-on reset (POR) occurs when VCCA1 and

VCCA2 exceed 3V, resetting the fault latch and soft-start

counter, and preparing the PWM for switching. VCCA

undervoltage lockout (UVLO) circuitry inhibits switching

and forces the DL gate driver high until VCCA rises above

4.2V. At this time the circuit will come out of UVLO and

begin switching, and the softstart circuit being enabled,

will progressively limit the output current over a prede-

termined time period. The ramp occurs in four steps: 25%,

50%, 75% and 100%, thereby limiting the slew rate of

the output voltage. There is 100mV of hysteresis built

into the UVLO circuit and when the VCCA falls to 4.1V the

output drivers are shutdown and tristated.

MOSFET Gate Drivers

The DH and DL drivers are optimized for driving moder-

ate-sized high-side, and larger low-side power MOSFETs.

An adaptive dead-time circuit monitors the DL output and

prevents the high-side MOSFET from turning on, until DL

is fully off, and conversely, monitors the DH output and

prevents the low-side MOSFET from turning on until DH

is fully off. Be sure there is low resistance and low induc-

tance between the DH and DL outputs to the gate of

each MOSFET.

Design Procedure

Prior to any design of a switch mode power supply (SMPS)

for notebook computers, determination of input voltage,

load current, switching frequency and inductor ripple cur-

rent must be specified.

Input Voltage Range

The maximum input voltage (VIN

MAX) is determined by the

highest AC adaptor voltage. The minimum input voltage

(VIN

MIN) is determined by the lowest battery voltage after

accounting for voltage drops due to connectors, fuses

and battery selector switches.

Maximum Load Current

There are two values of load current to consider. Con-

tinuous load current and peak load current. Continuous

load current has more to do with thermal stresses and

therefore drives the selection of input capacitors,

MOSFETs and commutation diodes. Whereas, peak load

current determines instantaneous component stresses

and filtering requirements such as, inductor saturation,

output capacitors and design of the current limit circuit.

Switching Frequency

Switching frequency determines the trade-off between

size and efficiency. Increased frequency increases the

switching losses in the MOSFETs, since losses are a func-

tion of VIN2. Knowing the maximum input voltage and

budget for MOSFET switches usually dictates where the

design ends up.

Inductor Ripple Current

Low inductor values create higher ripple current, result-

ing in smaller size, but are less efficient because of the

high AC currents flowing through the inductor. Higher in-

ductor values do reduce the ripple current and are more

efficient, but are larger and more costly. The selection of

the ripple current is based on the maximum output cur-

rent and tends to be between 20% to 50% of the maxi-

mum load current. Again, cost, size and efficiency all play

a part in the selection process.

Application Information (Cont.)

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