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SC1486ITSTRT bảng dữ liệu(PDF) 9 Page - Semtech Corporation |
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SC1486ITSTRT bảng dữ liệu(HTML) 9 Page - Semtech Corporation |
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9 / 17 page ![]() 9 2002 Semtech Corp. www.semtech.com SC1486 POWER MANAGEMENT +5V Bias Supplies The SC1486 requires an external +5V bias supply in ad- dition to the battery. If stand-alone capability is required, the +5V supply can be generated with an external linear regulator such as the Semtech LP2951A. To minimize channel to channel crosstalk, each controller has 4 sup- ply pins, VDDP, PGND, VCCA and AGND. To avoid ground loops, separate AGND planes are rec- ommended. Each contoller requires its own AGND plane which should be tied by a single trace to the negative terminal of that controller’s output capacitor. All external components referenced to AGND in the schematic should then be connected to the appropriate AGND plane. The supply decoupling capacitor for controller 1 should be tied between VCCA1 and AGND1. Likewise, the supply decoupling capacitor for controller 2 should be tied be- tween VCCA2 and AGND2. A single 10 ohms resistor should be used to decouple the VCCA supplies from the main VDDP supplies. PGND can then be a separate plane which is not used for routing traces. All PGND connec- tions are connected directly to this plane with special attention given to avoiding indirect connections which may create ground loops. As mentioned above, the two AGND planes must be connected to the PGND plane at the negative terminal of the respective output capaci- tors. The VDDP1 and VDDP2 input provides power to the upper and lower gate drivers. A decoupling capacitor for each supply is recommended. No series resistor be- tween VDDP and the 5 volt bias is required. Pseudo-fixed Frequency Constant On-Time PWM Controller The PWM control architecture consists of a constant-on- time, pseudo fixed frequency PWM controller, (Figure 1). The output ripple voltage developed across the output filter capacitor’s ESR provides the PWM ramp signal elimi- nating the need for a current sense resistor. The high- side switch on-time is determined by a one-shot whose period is directly proportional to output voltage and in- versely proportional to input voltage. A second one-shot sets the minimum off-time which is typically 400ns. On-Time One-Shot (T ON) The on-time one-shot comparator has two inputs. One input looks at the output voltage, while the other input samples the input voltage and converts it to a current. This input voltage proportional current is used to charge an internal on-time capacitor. The TON time is the time required for the voltage on this capacitor to charge from zero volts to VOUT, thereby making the on-time of the high-side switch directly proportional to output voltage and inversely proportional to input voltage. This imple- mentation results in a nearly constant switching frequency without the need of a clock generator. • + • = − IN OUT 3 TON 12 ON V V ) 10 x 37 R ( 10 x 3 . 3 T +50ns RTON is a resistor connected from the input supply to the TON pin. Enable & Psave The EN/PSV pin enables the VDDQ (2.5 volt) supply. REFIN and VDDP2 enable the VTT (1.25 volt) supply. The VTT and VDDQ supplies may be enabled independently. When EN/PSV is tied to VCCA the VDDQ controller is enabled and power save will also be enabled. When the EN/PSV pin is tristated, an internal pulled-up will acti- vate the VDDQ controller and power save will be disabled. If PSAVE is enabled, the SC1486 PSAVE comparator will look for the inductor current to cross zero on eight con- secutive cycles. Once observed, the controller will enter power save and turn off the low side MOSFET when the current crosses zero. To improve the efficiency and add hysteresis, the on time is increased by 50% in power save. The efficiency improvement at light loads more than offsets the disadvantage of slighlty higher output ripple. If the inductor current does not cross zero on any switch- ing cycle, the controller will immediately exit power save. Since the controller counts crossings, the converter can sink current as long as the current does not cross zero on eight consecutive cycles. This allows the output volt- age to recover quickly in response to negative load steps even when psave is enabled.Since the VTT supply must sink current, this controller does not have a power save option. If REFIN is low, the VTT controller shuts down to a low bias current. If Refin is greater than 1 volt, and VDDP2 is low, the reference buffer is active, but the VTT buck converter is disabled (S3 state). If REFIN is greater than 1 volt and VDDP is greater than 4 volts, the VTT supply is active. Output Voltage Selection The output voltage selection is set by the feedback re- sistors R2 & R3 of Figure 3. The internal reference is 1.5V. The internal feedback pin is multiplied by three to match the 1.5V reference. Therefore the output can beselected to a minimum of 0.5V. The equation for set- ting he output voltage based on Figure 3 is: Application Information |
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