CDCE62005RGZR datasheet(64/76 Pages) TI

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Vout

(6)

out

(7)

3.3

1.8

1.8 10

164

110

Out

5 pF

Locked

Unlocked

80k

110 uA

Vcc

PFD/

FromInputDivider

FromFeedbackDivider

PLL_LOCK

ToHost

Lock_I

CDCE62005

SCAS862 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com

Analog Lock Detect

Figure 37 shows the Analog Lock Detect circuit. Depending upon the phase relationship of the two signals

presented at the PFD/CP inputs, the lock detect circuit either charges (if the PLL is locked) or discharges (if PLL

is unlocked) the circuit shown via 100

µA current sources. An external capacitor determines the sensitivity of the

lock detect circuit. The value of the capacitor determines the rate of change of the voltage presented on the

output pin PLL_LOCK and hence how quickly the PLL_LOCK output toggles based on a change of PLL locked

status. The PLL_LOCK pin is an analog output in analog lock detect mode.

Solving for t yields:

VH = 0.55 × VCC

VL = 0.35 × VCC

For Example, let:

Figure 37. CDCE62005 Analog Lock Detect

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