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PCA2002CX8/5/1 bảng dữ liệu(PDF) 16 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  32 kHz watch circuit with programmable output period and pulse width
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PCA2002_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 11 November 2008
16 of 25
NXP Semiconductors
PCA2002
32 kHz watch circuit programmable output period and pulse width
[1]
All coordinates are referenced, in
µm, to the center of the die (see Figure 10 and Figure 11).
[2]
The substrate (rear side of the chip) is connected to VSS. Therefore, the die pad must be either floating or
connected to VSS.
[3]
Pad i.c. is used for factory test; in normal operation it must be left open-circuit, and it has an internal
pull-down resistor connected to VSS.
Fig 11. Bare die outline PCA200xCX (WLCSP8)
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
PCA200xCX
WLCSP8: wafer level chip-size package; 8 bumps; 1.16 x 0.86 x 0.31 mm
PCA200xCX
UNIT
mm
max
nom
min
0.310
0.275
0.240
0.090
0.075
0.060
1.16
0.86
0.17
0.32
A
DIMENSIONS (mm are the original dimensions)
A1
A2
0.22
0.20
0.18
D
0.12
0.10
0.08
b
E
e1
e2
eD
0.96
0
0.5
1 mm
scale
X
detail X
A
A2
A1
D
b
e1
e2
E
eD
08-05-09
08-05-21
Table 11.
Bonding pad and solder bump locations
Symbol
Pad
Coordinates[1]
x
y
VSS[2]
1
−480
+330
i.c.[3]
2
−480
+160
OSCIN
3
−480
−160
OSCOUT
4
−480
−330
VDD
5
+480
−330
MOT1
6
+480
−160
MOT2
7
+480
+160
RESET
8
+480
+330



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