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TMS320C6745PTP2 bảng dữ liệu(PDF) 1 Page - Texas Instruments

tên linh kiện TMS320C6745PTP2
Giải thích chi tiết về linh kiện  Floating-point Digital Signal Processor
PDF  203 Pages
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Trang chủ  http://www.ti.com
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TMS320C6745PTP2 bảng dữ liệu(HTML) 1 Page - Texas Instruments

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1
TMS320C6745/6747 Floating-point Digital Signal Processor
1.1 Features
TMS320C6745/6747 Floating-point Digital Signal Processor
www.ti.com
SPRS377B – SEPTEMBER 2008 – REVISED DECEMBER 2008
• Mixed-Precision IEEE Floating Point
• Applications
Multiply Supported up to:
–
Industrial Control
–
2 SP x SP -> SP Per Clock
–
USB, Networking
–
2 SP x SP -> DP Every Two Clocks
–
High-Speed Encoding
–
2 SP x DP -> DP Every Three Clocks
–
Professional Audio
–
2 DP x DP -> DP Every Four Clocks
• Software Support
• Fixed Point Multiply Supports Two 32 x
–
TI DSP/BIOS™
32-Bit Multiplies, Four 16 x 16-Bit
–
Chip Support Library and DSP Library
Multiplies, or Eight 8 x 8-Bit Multiplies
• 300-MHz C674x VLIW DSP
per Clock Cycle, and Complex Multiples
–
Instruction Packing Reduces Code Size
• C674x Instruction Set Features
–
All Instructions Conditional
–
Superset of the C67x+™ and C64x+™ ISAs
–
Hardware Support for Modulo Loop
–
2400/1800 C674x MIPS/MFLOPS
Operation
–
Byte-Addressable (8-/16-/32-/64-Bit Data)
–
Protected Mode Operation
–
8-Bit Overflow Protection
–
Exceptions Support for Error Detection and
–
Bit-Field Extract, Set, Clear
Program Redirection
–
Normalization, Saturation, Bit-Counting
• 128K-Byte RAM Shared Memory (C6747 Only)
–
Compact 16-Bit Instructions
• 3.3V LVCMOS IOs (except for USB interfaces)
• C674x Two Level Cache Memory Architecture
• Two External Memory Interfaces:
–
32K-Byte L1P Program RAM/Cache
–
EMIFA
–
32K-Byte L1D Data RAM/Cache
• NOR (8-/16-Bit-Wide Data)
–
256K-Byte L2 Unified Mapped RAM/Cache
• NAND (8-/16-Bit-Wide Data)
–
Flexible RAM/Cache Partition (L1 and L2)
• 16-Bit SDRAM With 128MB Address
–
1024K-Byte L2 ROM
Space
• Enhanced Direct-Memory-Access Controller 3
–
EMIFB
(EDMA3):
• 32-Bit or 16-Bit SDRAM With 256MB
–
2 Transfer Controllers
Address Space (C6747)
–
32 Independent DMA Channels
• 16-Bit SDRAM With 256MB Address
–
8 Quick DMA Channels
Space (C6745)
–
Programmable Transfer Burst Size
• Three Configurable 16550 type UART Modules:
• TMS320C674x Floating Point VLIW DSP Core
–
UART0 With Modem Control Signals
–
Load-Store Architecture With Non-Aligned
–
16-byte FIFO
Support
–
16x or 13x Oversampling Option
–
64 General-Purpose Registers (32 Bit)
• LCD Controller (C6747 Only)
–
Six ALU (32-/40-Bit) Functional Units
• Two Serial Peripheral Interfaces (SPI) Each
• Supports 32-Bit Integer, SP (IEEE Single
With One Chip-Select
Precision/32-Bit) and DP (IEEE Double
Precision/64-Bit) Floating Point
• Multimedia Card (MMC)/Secure Digital (SD)
• Supports up to Four SP Additions Per
Card Interface with Secure Data I/O (SDIO)
Clock, Four DP Additions Every 2
• Two Master/Slave Inter-Integrated Circuit (I2C
Clocks
Bus™)
• Supports up to Two Floating Point (SP
• One Host-Port Interface (HPI) With 16-Bit-Wide
or DP) Approximate Reciprocal or
Muxed Address/Data Bus For High Bandwidth
Square Root Operations Per Cycle
(C6747 only)
–
Two Multiply Functional Units
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
TMS320C6000, C6000 are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
ADVANCE INFORMATION concerns new products in the sampling
Copyright © 2008–2008, Texas Instruments Incorporated
or preproduction phase of development. Characteristic data and
other specifications are subject to change without notice.


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