M16CSLASH62M datasheet(449/615 Pages) RENESAS

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A-D Converter

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

2-132

2.7.10 Precautions for A-D Converter

AVSS

AVCC

VREF

ANi

Microcomputer

≥0.47 µF, C2≥0.47 µF, C3≥100 pF

(for reference)

Use thick and shortest possible wiring

to connect capacitors.

Note 1:

Note 2:

VCC

Figure 2.7.22. Use of capacitors to reduce noise

(1) Write to each bit (except bit 6) of A-D control register 0, to each bit of A-D control register 1,

and to bit 0 of A-D control register 2 when A-D conversion is stopped (before a trigger occurs).

In particular, when the Vref connection bit is changed from 0 to 1, start A-D conversion after

an elapse of 1

µs or longer.

(2) To reduce conversion error due to noise, connect a voltage to the AVcc pin and to the Vref pin from

an independent source. It is recommended to connect a capacitor between the AVss pin and the

AVcc pin, between the AVss pin and the Vref pin, and between the AVss pin and the analog input

pin (ANi). Figure 2.7.22 shows the an example of connecting the capacitors to these pins.

(3) Set the direction register of the following ports to input: the port corresponding to a pin to be

used as an analog input pin and external trigger input pin (P97).

(4) In using a key-input interrupt, none of the 4 pins (AN4 through AN7) can be used as an A-D

conversion port (if the A-D input voltage goes to “L” level, a key-input interrupt occurs).

(5) If using the A-D converter with Vcc = 2.7V to 4.0 V:

Use only a divided frequency for fAD (undivided fAD is not allowed).

Select without the Sample & Hold feature.

Select 8-bit mode.

(6) Rewrite to analog input pin select bits after changing A-D operation mode.

(7) When using the one-shot or single sweep mode

Confirm that A-D conversion is complete before reading the A-D register.

(Note: When A-D conversion interrupt request bit is set, it shows that A-D conversion is completed.)

(8) When using the repeat mode or repeat sweep mode 0 or 1

Use the undivided main clock as the internal CPU clock.

(9) Use AD under 10 MHz. When XIN is over 10 MHz, divide it.

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