M32CSLASH86 datasheet(477/505 Pages) RENESAS

tên linh kiện	M32C/86

Giải thích chi tiết về linh kiện	RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES

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Page 454

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27. Precautions (Bus)

27.3 Bus

__________

27.3.1 HOLD Signal

When entering microprocessor mode or memory expansion mode from single-chip mode and using

__________

HOLD input, set the PM01 and PM00 bits to "112" (microprocessor mode) or to "012" (memory expansion

mode) after setting the PD4_7 to PD4_0 bits in the PD4 register and the PD5_2 to PD5_0 bits in the PD5

_____

_______

______ ______ ________ ______ _______

________

P40 to P47 (A16 to A22, A23, CS0 to CS3, MA8 to MA12) and P50 to P52 (RD/WR/BHE, RD/WRL/WRH)

__________

are not placed in high-impedance states even when a low-level ("L") signal is applied to the HOLD pin, if

the PM01 and PM00 bits are set to "112" (microprocessor mode) or to "012" (memory expansion mode)

after setting the PD4_7 to PD4_0 bits in the PD4 register and the PD5_2 to PD5_0 bits in the PD5 register

to "1" (output mode) in single-chip mode.

27.3.2 External Bus

The internal ROM cannot be read when a high-level ("H") signal is applied to the CNVSS pin and the

hardware reset (hardware reset 1 or brown-out detection reset) occurs.

M32C/86 bảng dữ liệu(PDF) 477 Page - Renesas Technology Corp