M32CSLASH86 datasheet(395/505 Pages) RENESAS

395 / 505 page

Page 372

24. Programmable I/O Ports

)

(

Figure 24.6 P0 to P15 Registers

NOTES:

1. In memory expansion mode and microprocessor mode, the Pi register cannot control pins being used

as bus control pins (A0 to A22, A23, D0 to D15, CS0 to CS3, WRL/WR, WRH/BHE, RD,

BCLK/ALE/CLKOUT, HLDA/ALE, HOLD, ALE and RDY).

M32C/86T cannot be used in memory expansion mode and microprocessor mode.

2. P70 and P71 are ports for the N-channel open drain output. The pins go into high-impedance states

when P70 and P71 output "H" signal.

3. The P8_5 bit is for read only.

4. Nothing is assigned in the P11_7 to P11_5 bits in the P11 register and the P14_7 bit in the P14

Function

Port Pi Register (i=0 to 15)(1, 2)

Bit Name

Bit

Symbol

Address

After Reset

P0 to P5

03E016, 03E116, 03E416, 03E516, 03E816, 03E916

Indeterminate

P6 to P10

03C016, 03C116(3), 03C416(4), 03C516, 03C816

Indeterminate

P11 to P15

03C916(5), 03CC16, 03CD16, 03D016(5), 03D116

Indeterminate

Pi_0

Pi_1

Pi_2

Port Pi0 Bit

Pi_3

Pi_4

Pi_5

Pi_7

Pi_6

Port Pi1 Bit

Port Pi2 Bit

Port Pi3 Bit

Port Pi4 Bit

Port Pi5 Bit

Port Pi6 Bit

Port Pi7 Bit

Pin levels can be read by reading

bits corresponding to programmable

ports in input mode.

Pin levels can be controlled by

writing to bits corresponding to

programmable ports in output mode.

0: "L" level

1: "H" level

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