HD6432351 datasheet(321/1025 Pages) RENESAS

321 / 1025 page

Section 7 DMA Controller (DMAC)

Rev. 3.00 Sep 15, 2006 page 287 of 988

REJ09B0330-0300

generated, is less than one state with respect to the DMAC clock (bus master clock), edge

detection may not be possible and the interrupt may be ignored.

Also, in medium-speed mode,

DREQ pin sampling is performed on the rising edge of the medium-

speed clock.

Write Data Buffer Function

When the WDBE bit of BCRL in the bus controller is set to 1, enabling the write data buffer

function, dual address transfer external write cycles or single address transfers and internal

accesses (on-chip memory or internal I/O registers) are executed in parallel.

(a) Write Data Buffer Function and DMAC Register Setting

If the setting of is changed during execution of an external access by means of the write data

buffer function, the external access may not be performed normally. The register that controls

external accesses should only be manipulated when external reads, etc., are used with DMAC

operation disabled, and the operation is not performed in parallel with external access.

(b) Write Data Buffer Function and DMAC Operation Timing

The DMAC can start its next operation during external access using the write data buffer function.

Consequently, the

DREQ pin sampling timing, TEND output timing, etc., are different from the

case in which the write data buffer function is disabled. Also, internal bus cycles maybe hidden,

and not visible.

TEND

TEND Output

A low level is not output from the

TEND pin if the bus cycle in which a low level is to be output

from the

TEND pin is an internal bus cycle, and an external write cycle is executed in parallel with

this cycle. Note, for example, that a low level may not be output from the

TEND pin if the write

data buffer function is used when data transfer is performed between an internal I/O register and

on-chip memory.

If at least one of the DMAC transfer addresses is an external address, a low level is output from

the

TEND pin.

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