R8C2K datasheet(310/471 Pages) RENESAS

310 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 293 of 450

REJ09B0406-0110

Figure 16.133 Operating Example of Complementary PWM Mode

m+2-p

n+1

n+1-p

m-p-n+1

Value in TRDi register

Count source

TRDIOD0 output

m: Value set in TRDGRA0 register

n: Value set in TRDGRB0 register

p: Value set in TRD0 register

TRDIOB0 output

IMFA bit in

TRDSR0 register

TRDGRB0 register

Bits TSTART0 and TSTART1

in TRDSTR register

TRDIOC0 output

0000h

m+1

(m-p-n+1)

× 2

Width of normal-

phase active level

Dead

time

(n+1-p)

× 2

Width of counter-phase active level

Set to

FFFFh

UDF bit in

TRDSR1 register

Following data

Modify with a program

TRDGRD0 register

Transfer (when bits CMD1 to CMD0 are set to 11b)

Transfer (when bits CMD1 to CMD0

are set to 10b)

Value in TRD1 register

Value in TRD0 register

CMD0, CMD1: Bits in TRDFCR register

i = 0 or 1

The above applies under the following conditions:

Bits OLS1 and OLS0 in TRDFCR are set to 0 (initial output level “H”, active level “L” for normal-phase and counter-phase)

Set to 0 by a program

Active level “L”

Initial output “H”

Set to 0 by a program

IMFB bit in

TRDSR0 register

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