7540 datasheet(10/88 Pages) RENESAS

10 / 88 page

7540 Group

Rev.4.00

Jun 21, 2004

page 10 of 82

REJ03B0011-0400Z

PCL

Processor Status Register (PS)

Carry Flag

b15

PCH

Zero Flag

Interrupt Disable Flag

Decimal Mode Flag

Break Flag

Index X Mode Flag

Overflow Flag

Negative Flag

Program Counter

Stack Pointer

Index Register Y

Index Register X

Accumulator

FUNCTIONAL DESCRIPTION

Central Processing Unit (CPU)

The MCU uses the standard 740 family instruction set. Refer to

the table of 740 family addressing modes and machine-language

instructions or the SERIES 740 <SOFTWARE> USER’S MANUAL

for details on each instruction set.

Machine-resident 740 family instructions are as follows:

1. The FST and SLW instructions cannot be used.

2. The MUL and DIV instructions can be used.

3. The WIT instruction can be used.

4. The STP instruction can be used. (This instruction cannot be

used while an on-chip oscillator is operating.)

Accumulator (A)

The accumulator is an 8-bit register. Data operations such as data

transfer, etc., are executed mainly through the accumulator.

Index register X (X), Index register Y (Y)

Both index register X and index register Y are 8-bit registers. In

the index addressing modes, the value of the OPERAND is added

to the contents of register X or register Y and specifies the real

address.

When the T flag in the processor status register is set to “1”, the

value contained in index register X becomes the address for the

second OPERAND.

Stack pointer (S)

The stack pointer is an 8-bit register used during subroutine calls

and interrupts. The stack is used to store the current address data

and processor status when branching to subroutines or interrupt

routines.

The lower eight bits of the stack address are determined by the

contents of the stack pointer. The upper eight bits of the stack ad-

dress are determined by the Stack Page Selection Bit. If the Stack

Page Selection Bit is “0”, then the RAM in the zero page is used

as the stack area. If the Stack Page Selection Bit is “1”, then RAM

in page 1 is used as the stack area.

The Stack Page Selection Bit is located in the SFR area in the

zero page. Note that the initial value of the Stack Page Selection

Bit varies with each microcomputer type. Also some microcom-

puter types have no Stack Page Selection Bit and the upper eight

bits of the stack address are fixed. The operations of pushing reg-

ister contents onto the stack and popping them from the stack are

shown in Fig. 10.

Program counter (PC)

The program counter is a 16-bit counter consisting of two 8-bit

registers PCH and PCL. It is used to indicate the address of the

next instruction to be executed.

Fig. 9 740 Family CPU register structure

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