M3882 datasheet(21/62 Pages) RENESAS

21 / 62 page

Rev.1.01

Nov 14, 2005

page 21 of 60

REJ03B0089-0101

3882 Group

Interrupt Request

Generating Conditions

Remarks

Interrupt Source

Reset (Note 2)

INT0

Input buffer full

(IBF)

INT1

Output buffer

empty (OBE)

Timer X

Timer Y

Timer 1

Timer 2

INT5

CNTR0

INT0

CNTR1

INT1

INT2

INT3

INT4

Key-on wake-up

BRK instruction

Low

High

FFFD16

FFFB16

FFF916

FFF716

FFF316

FFF116

FFEF16

FFED16

FFEB16

Priority

Table 8 Interrupt vector addresses and priority

Vector Addresses (Note 1)

At reset

At detection of either rising or

falling edge of INT0 input

At input data bus buffer writing

At detection of either rising or

falling edge of INT1 input

At output data bus buffer read-

ing

At timer X underflow

At timer Y underflow

At timer 1 underflow

At timer 2 underflow

At detection of either rising or

falling edge of INT5 input

At detection of either rising or

falling edge of CNTR0 input

At detection of either rising or

falling edge of INT0 input

At detection of either rising or

falling edge of CNTR1 input

At detection of either rising or

falling edge of INT1 input

At detection of either rising or

falling edge of INT2 input

At detection of either rising or

falling edge of INT3 input

At detection of either rising or

falling edge of INT4 input

At falling of port P3 (at input)

input logical level AND

At BRK instruction execution

Non-maskable

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

STP release timer underflow

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt (falling valid)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt

(active edge selectable)

External interrupt (falling valid)

Non-maskable software interrupt

At falling edge of LRESET input

Notes 1: Vector addresses contain interrupt jump destination addresses.

2: Reset functions in the same way as an interrupt with the highest priority.

FFFC16

FFFA16

FFF816

FFF616

FFF216

FFF016

FFEE16

FFEC16

FFEA16

FFE816

FFE416

FFE216

FFE016

FFDE16

FFDC16

LRESET

FFE516

FFE916

FFE316

FFE116

FFDF16

FFDD16

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